arm64: dts: qcom: sdm845: Add support for LMh node

Add LMh nodes for CPU cluster0 and CPU cluster1. Also add interrupt
support in cpufreq node to capture the LMh interrupt and let the scheduler
know of the max frequency throttling.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210809191605.3742979-5-thara.gopinath@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 425f169b5d1e0ceaa8482724ca130a34d2c464a8..5a1a81e15ca69b81923002db3c31e1347e5145b5 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3641,6 +3641,30 @@
                        };
                };
 
+               lmh_cluster1: lmh@17d70800 {
+                       compatible = "qcom,sdm845-lmh";
+                       reg = <0 0x17d70800 0 0x400>;
+                       interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+                       cpus = <&CPU4>;
+                       qcom,lmh-temp-arm-millicelsius = <65000>;
+                       qcom,lmh-temp-low-millicelsius = <94500>;
+                       qcom,lmh-temp-high-millicelsius = <95000>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+               };
+
+               lmh_cluster0: lmh@17d78800 {
+                       compatible = "qcom,sdm845-lmh";
+                       reg = <0 0x17d78800 0 0x400>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+                       cpus = <&CPU0>;
+                       qcom,lmh-temp-arm-millicelsius = <65000>;
+                       qcom,lmh-temp-low-millicelsius = <94500>;
+                       qcom,lmh-temp-high-millicelsius = <95000>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+               };
+
                sound: sound {
                };
 
@@ -4912,6 +4936,8 @@
                        reg = <0 0x17d43000 0 0x1400>, <0 0x17d45800 0 0x1400>;
                        reg-names = "freq-domain0", "freq-domain1";
 
+                       interrupts-extended = <&lmh_cluster0 0>, <&lmh_cluster1 0>;
+
                        clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
                        clock-names = "xo", "alternate";