unsigned int                    port_id;
 };
 
-static void flush_fifo(struct s3c64xx_spi_driver_data *sdd)
+static void s3c64xx_flush_fifo(struct s3c64xx_spi_driver_data *sdd)
 {
        void __iomem *regs = sdd->regs;
        unsigned long loops;
        return xfer->len > (FIFO_LVL_MASK(sdd) >> 1) + 1;
 }
 
-static void enable_datapath(struct s3c64xx_spi_driver_data *sdd,
-                           struct spi_transfer *xfer, int dma_mode)
+static void s3c64xx_enable_datapath(struct s3c64xx_spi_driver_data *sdd,
+                                   struct spi_transfer *xfer, int dma_mode)
 {
        void __iomem *regs = sdd->regs;
        u32 modecfg, chcfg;
        return RX_FIFO_LVL(status, sdd);
 }
 
-static int wait_for_dma(struct s3c64xx_spi_driver_data *sdd,
-                       struct spi_transfer *xfer)
+static int s3c64xx_wait_for_dma(struct s3c64xx_spi_driver_data *sdd,
+                               struct spi_transfer *xfer)
 {
        void __iomem *regs = sdd->regs;
        unsigned long val;
        return 0;
 }
 
-static int wait_for_pio(struct s3c64xx_spi_driver_data *sdd,
-                       struct spi_transfer *xfer)
+static int s3c64xx_wait_for_pio(struct s3c64xx_spi_driver_data *sdd,
+                               struct spi_transfer *xfer)
 {
        void __iomem *regs = sdd->regs;
        unsigned long val;
        sdd->state &= ~RXBUSY;
        sdd->state &= ~TXBUSY;
 
-       enable_datapath(sdd, xfer, use_dma);
+       s3c64xx_enable_datapath(sdd, xfer, use_dma);
 
        /* Start the signals */
        s3c64xx_spi_set_cs(spi, true);
        spin_unlock_irqrestore(&sdd->lock, flags);
 
        if (use_dma)
-               status = wait_for_dma(sdd, xfer);
+               status = s3c64xx_wait_for_dma(sdd, xfer);
        else
-               status = wait_for_pio(sdd, xfer);
+               status = s3c64xx_wait_for_pio(sdd, xfer);
 
        if (status) {
                dev_err(&spi->dev, "I/O Error: rx-%d tx-%d res:rx-%c tx-%c len-%d\n",
                                dmaengine_terminate_all(sdd->rx_dma.ch);
                }
        } else {
-               flush_fifo(sdd);
+               s3c64xx_flush_fifo(sdd);
        }
 
        return status;
        val |= (S3C64XX_SPI_TRAILCNT << S3C64XX_SPI_TRAILCNT_OFF);
        writel(val, regs + S3C64XX_SPI_MODE_CFG);
 
-       flush_fifo(sdd);
+       s3c64xx_flush_fifo(sdd);
 }
 
 #ifdef CONFIG_OF