if (mmc_can_erase(card))
mmc_queue_setup_discard(mq->queue, card);
- if (!mmc_dev(host)->dma_mask || !*mmc_dev(host)->dma_mask)
- blk_queue_bounce_limit(mq->queue, BLK_BOUNCE_HIGH);
blk_queue_max_hw_sectors(mq->queue,
min(host->max_blk_count, host->max_req_size / 512));
if (host->can_dma_map_merge)
tristate "SDHCI support for the Freescale eSDHC ColdFire controller"
depends on M5441x
depends on MMC_SDHCI_PLTFM
+ depends on !HIGHMEM
select MMC_SDHCI_IO_ACCESSORS
help
This selects the Freescale eSDHC controller support for
config MMC_MOXART
tristate "MOXART SD/MMC Host Controller support"
depends on ARCH_MOXART || COMPILE_TEST
+ depends on !HIGHMEM
help
This selects support for the MOXART SD/MMC Host Controller.
MOXA provides one multi-functional card reader which can
tristate "TI OMAP Multimedia Card Interface support"
depends on ARCH_OMAP
depends on TPS65010 || !MACH_OMAP_H2
+ depends on !HIGHMEM
help
This selects the TI OMAP Multimedia card Interface.
If you have an OMAP board with a Multimedia Card slot,
config MMC_MXC
tristate "Freescale i.MX21/27/31 or MPC512x Multimedia Card support"
depends on ARCH_MXC || PPC_MPC512x
+ depends on !HIGHMEM
help
This selects the Freescale i.MX21, i.MX27, i.MX31 or MPC512x
Multimedia Card Interface. If you have an i.MX or MPC512x platform
tristate "Marvell MMC/SD/SDIO host driver"
depends on PLAT_ORION || (COMPILE_TEST && ARM)
depends on OF
+ depends on !HIGHMEM
help
This selects the Marvell SDIO host driver.
SDIO may currently be found on the Kirkwood 88F6281 and 88F6192
config MMC_DAVINCI
tristate "TI DAVINCI Multimedia Card Interface support"
depends on ARCH_DAVINCI || COMPILE_TEST
+ depends on !HIGHMEM
help
This selects the TI DAVINCI Multimedia card Interface.
If you have an DAVINCI board with a Multimedia Card slot,
tristate "Samsung S3C SD/MMC Card Interface support"
depends on ARCH_S3C24XX || COMPILE_TEST
depends on S3C24XX_DMAC || COMPILE_TEST
+ depends on !HIGHMEM
help
This selects a driver for the MCI interface found in
Samsung's S3C2410, S3C2412, S3C2440, S3C2442 CPUs.