= EXAMPLE
 
-q6afe@4 {
+apr-service@4 {
        compatible = "qcom,q6afe";
        reg = <APR_SVC_AFE>;
 
                #address-cells = <1>;
                #size-cells = <0>;
 
-               hdmi@1 {
-                       reg = <1>;
+               dai@1 {
+                       reg = <HDMI_RX>;
                };
 
-               tdm@24 {
-                       reg = <24>;
+               dai@24 {
+                       reg = <PRIMARY_TDM_RX_0>;
                        qcom,tdm-sync-mode = <1>:
                        qcom,tdm-sync-src = <1>;
                        qcom,tdm-data-out = <0>;
 
                };
 
-               tdm@25 {
-                       reg = <25>;
+               dai@25 {
+                       reg = <PRIMARY_TDM_TX_0>;
                        qcom,tdm-sync-mode = <1>:
                        qcom,tdm-sync-src = <1>;
                        qcom,tdm-data-out = <0>;
                        qcom,tdm-data-align = <0>;
                };
 
-               prim-mi2s-rx@16 {
-                       reg = <16>;
+               dai@16 {
+                       reg = <PRIMARY_MI2S_RX>;
                        qcom,sd-lines = <0 2>;
                };
 
-               prim-mi2s-tx@17 {
-                       reg = <17>;
+               dai@17 {
+                       reg = <PRIMARY_MI2S_TX>;
                        qcom,sd-lines = <1>;
                };
 
-               sec-mi2s-rx@18 {
-                       reg = <18>;
+               dai@18 {
+                       reg = <SECONDARY_MI2S_RX>;
                        qcom,sd-lines = <0 3>;
                };
 
-               sec-mi2s-tx@19 {
-                       reg = <19>;
+               dai@19 {
+                       reg = <SECONDARY_MI2S_TX>;
                        qcom,sd-lines = <1>;
                };
 
-               tert-mi2s-rx@20 {
-                       reg = <20>;
+               dai@20 {
+                       reg = <TERTIARY_MI2S_RX>;
                        qcom,sd-lines = <1 3>;
                };
 
-               tert-mi2s-tx@21 {
-                       reg = <21>;
+               dai@21 {
+                       reg = <TERTIARY_MI2S_TX>;
                        qcom,sd-lines = <0>;
                };
 
-               quat-mi2s-rx@22 {
-                       reg = <22>;
+               dai@22 {
+                       reg = <QUATERNARY_MI2S_RX>;
                        qcom,sd-lines = <0>;
                };
 
-               quat-mi2s-tx@23 {
-                       reg = <23>;
+               dai@23 {
+                       reg = <QUATERNARY_MI2S_TX>;
                        qcom,sd-lines = <1>;
                };
        };