drm/amd/display: Modify Vmin default value

Fine tune the Vmin clock value

Reviewed-by: Robin Chen <robin.chen@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Max Tseng <max.tseng@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
index d8fa229d78ce0338f046c824e468f3308f4cc829..64a2692fd4f6d9cb2b04e8c140d6d8a28fe40060 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
@@ -1914,7 +1914,7 @@ static bool dcn314_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
 
-       dc->caps.max_disp_clock_khz_at_vmin = 694000;
+       dc->caps.max_disp_clock_khz_at_vmin = 650000;
 
        /* Use pipe context based otg sync logic */
        dc->config.use_pipe_ctx_sync_logic = true;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
index 828846538a92915981420b222ae56accc41a3411..f1d776f3954365d4ef4e96dd2c5c729a046dc90f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
@@ -1830,7 +1830,13 @@ static bool dcn35_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
 
-       dc->caps.max_disp_clock_khz_at_vmin = 669154;
+       /* max_disp_clock_khz_at_vmin is slightly lower than the STA value in order
+        * to provide some margin.
+        * It's expected for furture ASIC to have equal or higher value, in order to
+        * have determinstic power improvement from generate to genration.
+        * (i.e., we should not expect new ASIC generation with lower vmin rate)
+        */
+       dc->caps.max_disp_clock_khz_at_vmin = 650000;
 
        /* Use pipe context based otg sync logic */
        dc->config.use_pipe_ctx_sync_logic = true;