drm/amd/display: Switch to immediate mode for updating infopackets

[ Upstream commit abba907c7a20032c2d504fd5afe3af7d440a09d0 ]

[Why]
Using FRAME_UPDATE will result in infopacket to be potentially updated
one frame late.
In commit stream scenarios for previously active stream, some stale
infopacket data from previous config might be erroneously sent out on
initial frame after stream is re-enabled.

[How]
Switch to using IMMEDIATE_UPDATE mode

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Ashley Thomas <Ashley.Thomas2@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
index 9aa258f3550b6edc0ae7f796d93c76e2af76e9da..ddf66046616d666446251249bdddf2fa00011946 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
@@ -121,35 +121,35 @@ void enc1_update_generic_info_packet(
        switch (packet_index) {
        case 0:
                REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
-                               AFMT_GENERIC0_FRAME_UPDATE, 1);
+                               AFMT_GENERIC0_IMMEDIATE_UPDATE, 1);
                break;
        case 1:
                REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
-                               AFMT_GENERIC1_FRAME_UPDATE, 1);
+                               AFMT_GENERIC1_IMMEDIATE_UPDATE, 1);
                break;
        case 2:
                REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
-                               AFMT_GENERIC2_FRAME_UPDATE, 1);
+                               AFMT_GENERIC2_IMMEDIATE_UPDATE, 1);
                break;
        case 3:
                REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
-                               AFMT_GENERIC3_FRAME_UPDATE, 1);
+                               AFMT_GENERIC3_IMMEDIATE_UPDATE, 1);
                break;
        case 4:
                REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
-                               AFMT_GENERIC4_FRAME_UPDATE, 1);
+                               AFMT_GENERIC4_IMMEDIATE_UPDATE, 1);
                break;
        case 5:
                REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
-                               AFMT_GENERIC5_FRAME_UPDATE, 1);
+                               AFMT_GENERIC5_IMMEDIATE_UPDATE, 1);
                break;
        case 6:
                REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
-                               AFMT_GENERIC6_FRAME_UPDATE, 1);
+                               AFMT_GENERIC6_IMMEDIATE_UPDATE, 1);
                break;
        case 7:
                REG_UPDATE(AFMT_VBI_PACKET_CONTROL1,
-                               AFMT_GENERIC7_FRAME_UPDATE, 1);
+                               AFMT_GENERIC7_IMMEDIATE_UPDATE, 1);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
index a512cbea00d17c2db49fb4d76bf24b9a908956c7..b9656614950e30661ee1951f5a8039fd2a7b5e6d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
@@ -275,7 +275,14 @@ struct dcn10_stream_enc_registers {
        SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC2_FRAME_UPDATE, mask_sh),\
        SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC3_FRAME_UPDATE, mask_sh),\
        SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_FRAME_UPDATE, mask_sh),\
+       SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC0_IMMEDIATE_UPDATE, mask_sh),\
+       SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC1_IMMEDIATE_UPDATE, mask_sh),\
+       SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC2_IMMEDIATE_UPDATE, mask_sh),\
+       SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC3_IMMEDIATE_UPDATE, mask_sh),\
        SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_IMMEDIATE_UPDATE, mask_sh),\
+       SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC5_IMMEDIATE_UPDATE, mask_sh),\
+       SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC6_IMMEDIATE_UPDATE, mask_sh),\
+       SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC7_IMMEDIATE_UPDATE, mask_sh),\
        SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC5_FRAME_UPDATE, mask_sh),\
        SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC6_FRAME_UPDATE, mask_sh),\
        SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC7_FRAME_UPDATE, mask_sh),\
@@ -339,7 +346,14 @@ struct dcn10_stream_enc_registers {
        type AFMT_GENERIC2_FRAME_UPDATE;\
        type AFMT_GENERIC3_FRAME_UPDATE;\
        type AFMT_GENERIC4_FRAME_UPDATE;\
+       type AFMT_GENERIC0_IMMEDIATE_UPDATE;\
+       type AFMT_GENERIC1_IMMEDIATE_UPDATE;\
+       type AFMT_GENERIC2_IMMEDIATE_UPDATE;\
+       type AFMT_GENERIC3_IMMEDIATE_UPDATE;\
        type AFMT_GENERIC4_IMMEDIATE_UPDATE;\
+       type AFMT_GENERIC5_IMMEDIATE_UPDATE;\
+       type AFMT_GENERIC6_IMMEDIATE_UPDATE;\
+       type AFMT_GENERIC7_IMMEDIATE_UPDATE;\
        type AFMT_GENERIC5_FRAME_UPDATE;\
        type AFMT_GENERIC6_FRAME_UPDATE;\
        type AFMT_GENERIC7_FRAME_UPDATE;\