iommu: Separate IOMMU_DEV_FEAT_IOPF from IOMMU_DEV_FEAT_SVA

Some devices manage I/O Page Faults (IOPF) themselves instead of relying
on PCIe PRI or Arm SMMU stall. Allow their drivers to enable SVA without
mandating IOMMU-managed IOPF. The other device drivers now need to first
enable IOMMU_DEV_FEAT_IOPF before enabling IOMMU_DEV_FEAT_SVA. Enabling
IOMMU_DEV_FEAT_IOPF on its own doesn't have any effect visible to the
device driver, it is used in combination with other features.

Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Link: https://lore.kernel.org/r/20210401154718.307519-4-jean-philippe@linaro.org
Signed-off-by: Joerg Roedel <jroedel@suse.de>

diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 16ce75693d834091f67a83d0c2c88427a29afe97..45c4eb372f5691dd7c77d41eef28a6cc2150b874 100644 (file)
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -156,10 +156,24 @@ struct iommu_resv_region {
        enum iommu_resv_type    type;
 };
 
-/* Per device IOMMU features */
+/**
+ * enum iommu_dev_features - Per device IOMMU features
+ * @IOMMU_DEV_FEAT_AUX: Auxiliary domain feature
+ * @IOMMU_DEV_FEAT_SVA: Shared Virtual Addresses
+ * @IOMMU_DEV_FEAT_IOPF: I/O Page Faults such as PRI or Stall. Generally
+ *                      enabling %IOMMU_DEV_FEAT_SVA requires
+ *                      %IOMMU_DEV_FEAT_IOPF, but some devices manage I/O Page
+ *                      Faults themselves instead of relying on the IOMMU. When
+ *                      supported, this feature must be enabled before and
+ *                      disabled after %IOMMU_DEV_FEAT_SVA.
+ *
+ * Device drivers query whether a feature is supported using
+ * iommu_dev_has_feature(), and enable it using iommu_dev_enable_feature().
+ */
 enum iommu_dev_features {
-       IOMMU_DEV_FEAT_AUX,     /* Aux-domain feature */
-       IOMMU_DEV_FEAT_SVA,     /* Shared Virtual Addresses */
+       IOMMU_DEV_FEAT_AUX,
+       IOMMU_DEV_FEAT_SVA,
+       IOMMU_DEV_FEAT_IOPF,
 };
 
 #define IOMMU_PASID_INVALID    (-1U)