thermal/drivers/qcom-spmi-temp-alarm: Add support for GEN2 rev 2 PMIC peripherals

Add support for TEMP_ALARM GEN2 PMIC peripherals with digital major
revision 2.  This revision utilizes individual temp DAC registers
to set the threshold temperature for over-temperature stages 1 (warning),
2 (system shutdown), and 3 (emergency shutdown) instead of a single
register to specify a set of thresholds.

Co-developed-by: David Collins <david.collins@oss.qualcomm.com>
Signed-off-by: David Collins <david.collins@oss.qualcomm.com>
Signed-off-by: Anjelique Melendez <anjelique.melendez@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250710224555.3047790-5-anjelique.melendez@oss.qualcomm.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

diff --git a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
index c8e4db585d2bfd3beb74fd3541131dcd70f7ad06..9fbfd192017daba8185d22ed951c2e538b06db0b 100644 (file)
--- a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
+++ b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
@@ -26,6 +26,11 @@
 #define QPNP_TM_REG_SHUTDOWN_CTRL1     0x40
 #define QPNP_TM_REG_ALARM_CTRL         0x46
 
+/* TEMP_DAC_STGx registers are only present for TEMP_GEN2 v2.0 */
+#define QPNP_TM_REG_TEMP_DAC_STG1      0x47
+#define QPNP_TM_REG_TEMP_DAC_STG2      0x48
+#define QPNP_TM_REG_TEMP_DAC_STG3      0x49
+
 #define QPNP_TM_TYPE                   0x09
 #define QPNP_TM_SUBTYPE_GEN1           0x08
 #define QPNP_TM_SUBTYPE_GEN2           0x09
@@ -71,6 +76,25 @@ static const long temp_map_gen2_v1[THRESH_COUNT][STAGE_COUNT] = {
 
 #define TEMP_STAGE_HYSTERESIS          2000
 
+/*
+ * For TEMP_GEN2 v2.0, TEMP_DAC_STG1/2/3 registers are used to set the threshold
+ * for each stage independently.
+ * TEMP_DAC_STG* = 0 --> 80 C
+ * Each 8 step increase in TEMP_DAC_STG* value corresponds to 5 C (5000 mC).
+ */
+#define TEMP_DAC_MIN                   80000
+#define TEMP_DAC_SCALE_NUM             8
+#define TEMP_DAC_SCALE_DEN             5000
+
+#define TEMP_DAC_TEMP_TO_REG(temp) \
+       (((temp) - TEMP_DAC_MIN) * TEMP_DAC_SCALE_NUM / TEMP_DAC_SCALE_DEN)
+#define TEMP_DAC_REG_TO_TEMP(reg) \
+       (TEMP_DAC_MIN + (reg) * TEMP_DAC_SCALE_DEN / TEMP_DAC_SCALE_NUM)
+
+static const long temp_dac_max[STAGE_COUNT] = {
+       119375, 159375, 159375
+};
+
 /* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
 #define DEFAULT_TEMP                   37000
 
@@ -93,6 +117,7 @@ struct qpnp_tm_chip {
        long                            temp;
        unsigned int                    stage;
        unsigned int                    base;
+       unsigned int                    ntrips;
        /* protects .thresh, .stage and chip registers */
        struct mutex                    lock;
        bool                            initialized;
@@ -310,6 +335,54 @@ static const struct thermal_zone_device_ops qpnp_tm_sensor_ops = {
        .set_trip_temp = qpnp_tm_set_trip_temp,
 };
 
+static int qpnp_tm_gen2_rev2_set_temp_thresh(struct qpnp_tm_chip *chip, unsigned int trip, int temp)
+{
+       int ret, temp_cfg;
+       u8 reg;
+
+       WARN_ON(!mutex_is_locked(&chip->lock));
+
+       if (trip >= STAGE_COUNT) {
+               dev_err(chip->dev, "invalid TEMP_DAC trip = %d\n", trip);
+               return -EINVAL;
+       } else if (temp < TEMP_DAC_MIN || temp > temp_dac_max[trip]) {
+               dev_err(chip->dev, "invalid TEMP_DAC temp = %d\n", temp);
+               return -EINVAL;
+       }
+
+       reg = TEMP_DAC_TEMP_TO_REG(temp);
+       temp_cfg = TEMP_DAC_REG_TO_TEMP(reg);
+
+       ret = qpnp_tm_write(chip, QPNP_TM_REG_TEMP_DAC_STG1 + trip, reg);
+       if (ret < 0) {
+               dev_err(chip->dev, "TEMP_DAC_STG write failed, ret=%d\n", ret);
+               return ret;
+       }
+
+       chip->temp_thresh_map[trip] = temp_cfg;
+
+       return 0;
+}
+
+static int qpnp_tm_gen2_rev2_set_trip_temp(struct thermal_zone_device *tz,
+                                          const struct thermal_trip *trip, int temp)
+{
+       unsigned int trip_index = THERMAL_TRIP_PRIV_TO_INT(trip->priv);
+       struct qpnp_tm_chip *chip = thermal_zone_device_priv(tz);
+       int ret;
+
+       mutex_lock(&chip->lock);
+       ret = qpnp_tm_gen2_rev2_set_temp_thresh(chip, trip_index, temp);
+       mutex_unlock(&chip->lock);
+
+       return ret;
+}
+
+static const struct thermal_zone_device_ops qpnp_tm_gen2_rev2_sensor_ops = {
+       .get_temp = qpnp_tm_get_temp,
+       .set_trip_temp = qpnp_tm_gen2_rev2_set_trip_temp,
+};
+
 static irqreturn_t qpnp_tm_isr(int irq, void *data)
 {
        struct qpnp_tm_chip *chip = data;
@@ -351,6 +424,60 @@ static int qpnp_tm_configure_trip_temp(struct qpnp_tm_chip *chip)
        return ret;
 }
 
+/* Configure TEMP_DAC registers based on DT thermal_zone trips */
+static int qpnp_tm_gen2_rev2_configure_trip_temps_cb(struct thermal_trip *trip, void *data)
+{
+       struct qpnp_tm_chip *chip = data;
+       int ret;
+
+       mutex_lock(&chip->lock);
+       trip->priv = THERMAL_INT_TO_TRIP_PRIV(chip->ntrips);
+       ret = qpnp_tm_gen2_rev2_set_temp_thresh(chip, chip->ntrips, trip->temperature);
+       chip->ntrips++;
+       mutex_unlock(&chip->lock);
+
+       return ret;
+}
+
+static int qpnp_tm_gen2_rev2_configure_trip_temps(struct qpnp_tm_chip *chip)
+{
+       int ret, i;
+
+       ret = thermal_zone_for_each_trip(chip->tz_dev,
+                                        qpnp_tm_gen2_rev2_configure_trip_temps_cb, chip);
+       if (ret < 0)
+               return ret;
+
+       /* Verify that trips are strictly increasing. */
+       for (i = 1; i < STAGE_COUNT; i++) {
+               if (chip->temp_thresh_map[i] <= chip->temp_thresh_map[i - 1]) {
+                       dev_err(chip->dev, "Threshold %d=%ld <= threshold %d=%ld\n",
+                               i, chip->temp_thresh_map[i], i - 1,
+                               chip->temp_thresh_map[i - 1]);
+                       return -EINVAL;
+               }
+       }
+
+       return 0;
+}
+
+/* Read the hardware default TEMP_DAC stage threshold temperatures */
+static int qpnp_tm_gen2_rev2_sync_thresholds(struct qpnp_tm_chip *chip)
+{
+       int ret, i;
+       u8 reg = 0;
+
+       for (i = 0; i < STAGE_COUNT; i++) {
+               ret = qpnp_tm_read(chip, QPNP_TM_REG_TEMP_DAC_STG1 + i, &reg);
+               if (ret < 0)
+                       return ret;
+
+               chip->temp_thresh_map[i] = TEMP_DAC_REG_TO_TEMP(reg);
+       }
+
+       return 0;
+}
+
 static const struct spmi_temp_alarm_data spmi_temp_alarm_data = {
        .ops = &qpnp_tm_sensor_ops,
        .temp_map = &temp_map_gen1,
@@ -375,6 +502,13 @@ static const struct spmi_temp_alarm_data spmi_temp_alarm_gen2_rev1_data = {
        .get_temp_stage = qpnp_tm_gen2_get_temp_stage,
 };
 
+static const struct spmi_temp_alarm_data spmi_temp_alarm_gen2_rev2_data = {
+       .ops = &qpnp_tm_gen2_rev2_sensor_ops,
+       .sync_thresholds = qpnp_tm_gen2_rev2_sync_thresholds,
+       .configure_trip_temps = qpnp_tm_gen2_rev2_configure_trip_temps,
+       .get_temp_stage = qpnp_tm_gen2_get_temp_stage,
+};
+
 /*
  * This function initializes the internal temp value based on only the
  * current thermal stage and threshold.
@@ -491,8 +625,10 @@ static int qpnp_tm_probe(struct platform_device *pdev)
                chip->data = &spmi_temp_alarm_data;
        else if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major == 0)
                chip->data = &spmi_temp_alarm_gen2_data;
-       else if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 1)
+       else if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major == 1)
                chip->data = &spmi_temp_alarm_gen2_rev1_data;
+       else if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 2)
+               chip->data = &spmi_temp_alarm_gen2_rev2_data;
        else
                return -ENODEV;