hwmon: (coretemp) Add PCI device ID for CE41x0 CPUs

Since we now have to use PCI IDs to detect CPU types anyway, use this mechanism
to detect CE41x0 CPUs. Advantage is that it only requires a single entry and
covers all variants of CE41x0, including those unknown to us.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>

diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index d84dae73203eb162572a24d155f4321a0c1e40ac..7eed10e20b38a236fbb0582e88f12834b75d5edf 100644 (file)
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -197,6 +197,7 @@ struct tjmax_pci {
 };
 
 static const struct tjmax_pci tjmax_pci_table[] = {
+       { 0x0708, 110000 },     /* CE41x0 (Sodaville ) */
        { 0x0c72, 102000 },     /* Atom S1240 (Centerton) */
        { 0x0c73, 95000 },      /* Atom S1220 (Centerton) */
        { 0x0c75, 95000 },      /* Atom S1260 (Centerton) */
@@ -210,9 +211,6 @@ struct tjmax {
 static const struct tjmax tjmax_table[] = {
        { "CPU  230", 100000 },         /* Model 0x1c, stepping 2       */
        { "CPU  330", 125000 },         /* Model 0x1c, stepping 2       */
-       { "CPU CE4110", 110000 },       /* Model 0x1c, stepping 10 Sodaville */
-       { "CPU CE4150", 110000 },       /* Model 0x1c, stepping 10      */
-       { "CPU CE4170", 110000 },       /* Model 0x1c, stepping 10      */
 };
 
 struct tjmax_model {