]> www.infradead.org Git - users/hch/misc.git/commitdiff
drm/amdgpu/mes12: optimize MES pipe FW version fetching
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 27 Mar 2025 21:46:59 +0000 (17:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 9 Apr 2025 14:53:11 +0000 (10:53 -0400)
Don't fetch it again if we already have it.  It seems the
registers don't reliably have the value at resume in some
cases.

Fixes: 785f0f9fe742 ("drm/amdgpu: Add mes v12_0 ip block support (v4)")
Reviewed-by: Shaoyun.liu <Shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 9e7b08d239c2f21e8f417854f81e5ff40edbebff)
Cc: stable@vger.kernel.org # 6.12.x
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

index 183dd3346da5769576e48d19f8aab03ecc827f2f..e6ab617b9a4041f1766ece1ff58b91a717c772d2 100644 (file)
@@ -1392,17 +1392,20 @@ static int mes_v12_0_queue_init(struct amdgpu_device *adev,
                mes_v12_0_queue_init_register(ring);
        }
 
-       /* get MES scheduler/KIQ versions */
-       mutex_lock(&adev->srbm_mutex);
-       soc21_grbm_select(adev, 3, pipe, 0, 0);
+       if (((pipe == AMDGPU_MES_SCHED_PIPE) && !adev->mes.sched_version) ||
+           ((pipe == AMDGPU_MES_KIQ_PIPE) && !adev->mes.kiq_version)) {
+               /* get MES scheduler/KIQ versions */
+               mutex_lock(&adev->srbm_mutex);
+               soc21_grbm_select(adev, 3, pipe, 0, 0);
 
-       if (pipe == AMDGPU_MES_SCHED_PIPE)
-               adev->mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
-       else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
-               adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
+               if (pipe == AMDGPU_MES_SCHED_PIPE)
+                       adev->mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
+               else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
+                       adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
 
-       soc21_grbm_select(adev, 0, 0, 0, 0);
-       mutex_unlock(&adev->srbm_mutex);
+               soc21_grbm_select(adev, 0, 0, 0, 0);
+               mutex_unlock(&adev->srbm_mutex);
+       }
 
        return 0;
 }