return REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);
 }
 
+static uint32_t kgd_hqd_sdma_get_doorbell(struct amdgpu_device *adev,
+                                         int engine, int queue)
+
+{
+       return 0;
+}
+
 const struct kfd2kgd_calls gfx_v7_kfd2kgd = {
        .program_sh_mem_settings = kgd_program_sh_mem_settings,
        .set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
        .set_scratch_backing_va = set_scratch_backing_va,
        .set_vm_context_page_table_base = set_vm_context_page_table_base,
        .read_vmid_from_vmfault_reg = read_vmid_from_vmfault_reg,
+       .hqd_sdma_get_doorbell = kgd_hqd_sdma_get_doorbell,
 };
 
                        lower_32_bits(page_table_base));
 }
 
+static uint32_t kgd_hqd_sdma_get_doorbell(struct amdgpu_device *adev,
+                                         int engine, int queue)
+
+{
+       return 0;
+}
+
 const struct kfd2kgd_calls gfx_v8_kfd2kgd = {
        .program_sh_mem_settings = kgd_program_sh_mem_settings,
        .set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
                        get_atc_vmid_pasid_mapping_info,
        .set_scratch_backing_va = set_scratch_backing_va,
        .set_vm_context_page_table_base = set_vm_context_page_table_base,
+       .hqd_sdma_get_doorbell = kgd_hqd_sdma_get_doorbell,
 };