unsigned int engine_id,
                                unsigned int queue_id)
 {
-       uint32_t sdma_engine_reg_base[2] = {
-               SOC15_REG_OFFSET(SDMA0, 0,
-                                mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL,
-               SOC15_REG_OFFSET(SDMA1, 0,
-                                mmSDMA1_RLC0_RB_CNTL) - mmSDMA1_RLC0_RB_CNTL
-       };
-       uint32_t retval = sdma_engine_reg_base[engine_id]
+       uint32_t sdma_engine_reg_base = 0;
+       uint32_t sdma_rlc_reg_offset;
+
+       switch (engine_id) {
+       default:
+               dev_warn(adev->dev,
+                        "Invalid sdma engine id (%d), using engine id 0\n",
+                        engine_id);
+               fallthrough;
+       case 0:
+               sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA0, 0,
+                               mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL;
+               break;
+       case 1:
+               sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0,
+                               mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL;
+               break;
+       }
+
+       sdma_rlc_reg_offset = sdma_engine_reg_base
                + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL);
 
        pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id,
-                       queue_id, retval);
+                queue_id, sdma_rlc_reg_offset);
 
-       return retval;
+       return sdma_rlc_reg_offset;
 }
 
 static inline struct v9_mqd *get_mqd(void *mqd)