field |= TRB_IOC;
                        more_trbs_coming = false;
                        td->last_trb = ring->enqueue;
+
+                       if (xhci_urb_suitable_for_idt(urb)) {
+                               memcpy(&send_addr, urb->transfer_buffer,
+                                      trb_buff_len);
+                               field |= TRB_IDT;
+                       }
                }
 
                /* Only set interrupt on short packet for IN endpoints */
        if (urb->transfer_buffer_length > 0) {
                u32 length_field, remainder;
 
+               if (xhci_urb_suitable_for_idt(urb)) {
+                       memcpy(&urb->transfer_dma, urb->transfer_buffer,
+                              urb->transfer_buffer_length);
+                       field |= TRB_IDT;
+               }
+
                remainder = xhci_td_remainder(xhci, 0,
                                urb->transfer_buffer_length,
                                urb->transfer_buffer_length,
 
 
 /*-------------------------------------------------------------------------*/
 
+/*
+ * Bypass the DMA mapping if URB is suitable for Immediate Transfer (IDT),
+ * we'll copy the actual data into the TRB address register. This is limited to
+ * transfers up to 8 bytes on output endpoints of any kind with wMaxPacketSize
+ * >= 8 bytes. If suitable for IDT only one Transfer TRB per TD is allowed.
+ */
+static int xhci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
+                               gfp_t mem_flags)
+{
+       if (xhci_urb_suitable_for_idt(urb))
+               return 0;
+
+       return usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
+}
+
 /**
  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
        /*
         * managing i/o requests and associated device resources
         */
+       .map_urb_for_dma =      xhci_map_urb_for_dma,
        .urb_enqueue =          xhci_urb_enqueue,
        .urb_dequeue =          xhci_urb_dequeue,
        .alloc_dev =            xhci_alloc_dev,
 
 #define TRB_IOC                        (1<<5)
 /* The buffer pointer contains immediate data */
 #define TRB_IDT                        (1<<6)
+/* TDs smaller than this might use IDT */
+#define TRB_IDT_MAX_SIZE       8
 
 /* Block Event Interrupt */
 #define        TRB_BEI                 (1<<9)
                                        urb->stream_id);
 }
 
+/*
+ * TODO: As per spec Isochronous IDT transmissions are supported. We bypass
+ * them anyways as we where unable to find a device that matches the
+ * constraints.
+ */
+static inline bool xhci_urb_suitable_for_idt(struct urb *urb)
+{
+       if (!usb_endpoint_xfer_isoc(&urb->ep->desc) && usb_urb_dir_out(urb) &&
+           usb_endpoint_maxp(&urb->ep->desc) >= TRB_IDT_MAX_SIZE &&
+           urb->transfer_buffer_length <= TRB_IDT_MAX_SIZE)
+               return true;
+
+       return false;
+}
+
 static inline char *xhci_slot_state_string(u32 state)
 {
        switch (state) {