drm/i915: Simplify snps/c10x DPLL state checker calling convetion

Passing in the atomic state + crtc state is a bit weird. The latter
can be just the crtc (which is the normal calling convention used
in a lot of other places).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 1aba265afe412363eb87aafbe91c2d9606ccad8f..0ef28f4be36e5ea68225799dafee4831f0321408 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -3005,12 +3005,13 @@ intel_mtl_port_pll_type(struct intel_encoder *encoder,
 }
 
 void intel_c10pll_state_verify(struct intel_atomic_state *state,
-                              const struct intel_crtc_state *new_crtc_state)
+                              struct intel_crtc *crtc)
 {
        struct drm_i915_private *i915 = to_i915(state->base.dev);
+       const struct intel_crtc_state *new_crtc_state =
+               intel_atomic_get_new_crtc_state(state, crtc);
        struct intel_c10pll_state mpllb_hw_state = { 0 };
        const struct intel_c10pll_state *mpllb_sw_state = &new_crtc_state->cx0pll_state.c10;
-       struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
        struct intel_encoder *encoder;
        enum phy phy;
        int i;

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.h b/drivers/gpu/drm/i915/display/intel_cx0_phy.h
index 43f2fdb662c5d7155c8e9611d21245b4a371facf..0e0a38dac8cdd968152c49504e7e6c9639aad7bc 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.h
@@ -16,6 +16,7 @@ struct drm_i915_private;
 struct intel_atomic_state;
 struct intel_c10pll_state;
 struct intel_c20pll_state;
+struct intel_crtc;
 struct intel_crtc_state;
 struct intel_encoder;
 struct intel_hdmi;
@@ -34,7 +35,7 @@ void intel_c10pll_dump_hw_state(struct drm_i915_private *dev_priv,
 int intel_c10pll_calc_port_clock(struct intel_encoder *encoder,
                                 const struct intel_c10pll_state *pll_state);
 void intel_c10pll_state_verify(struct intel_atomic_state *state,
-                              const struct intel_crtc_state *new_crtc_state);
+                              struct intel_crtc *crtc);
 void intel_c20pll_readout_hw_state(struct intel_encoder *encoder,
                                   struct intel_c20pll_state *pll_state);
 void intel_c20pll_dump_hw_state(struct drm_i915_private *i915,

diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
index e08c1aa25c4dffa576b1f94b3d774c228974370e..3acd7e086a3b5d2de15fd0c62175c08f617d540e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
@@ -237,8 +237,8 @@ void intel_modeset_verify_crtc(struct intel_crtc *crtc,
        verify_connector_state(state, crtc);
        verify_crtc_state(state, crtc);
        intel_shared_dpll_state_verify(state, crtc);
-       intel_mpllb_state_verify(state, new_crtc_state);
-       intel_c10pll_state_verify(state, new_crtc_state);
+       intel_mpllb_state_verify(state, crtc);
+       intel_c10pll_state_verify(state, crtc);
 }
 
 void intel_modeset_verify_disabled(struct drm_i915_private *dev_priv,

diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
index bdceb6bd474c0bfa0cde7c4d275f3bedf4370332..c0285365efae0bf98d289258984191f89fb76a90 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
@@ -1993,12 +1993,13 @@ int intel_snps_phy_check_hdmi_link_rate(int clock)
 }
 
 void intel_mpllb_state_verify(struct intel_atomic_state *state,
-                             const struct intel_crtc_state *new_crtc_state)
+                             struct intel_crtc *crtc)
 {
        struct drm_i915_private *i915 = to_i915(state->base.dev);
+       const struct intel_crtc_state *new_crtc_state =
+               intel_atomic_get_new_crtc_state(state, crtc);
        struct intel_mpllb_state mpllb_hw_state = { 0 };
        const struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->mpllb_state;
-       struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
        struct intel_encoder *encoder;
 
        if (!IS_DG2(i915))

diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.h b/drivers/gpu/drm/i915/display/intel_snps_phy.h
index 9d1d0c6a9cfef9c5c7ea32f662afa880bb4d7fe8..515abf7c5902709ea6419ccee95bc1c1995a7e47 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.h
@@ -10,6 +10,7 @@
 
 struct drm_i915_private;
 struct intel_atomic_state;
+struct intel_crtc;
 struct intel_crtc_state;
 struct intel_encoder;
 struct intel_mpllb_state;
@@ -33,6 +34,6 @@ int intel_snps_phy_check_hdmi_link_rate(int clock);
 void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder,
                                      const struct intel_crtc_state *crtc_state);
 void intel_mpllb_state_verify(struct intel_atomic_state *state,
-                             const struct intel_crtc_state *new_crtc_state);
+                             struct intel_crtc *crtc);
 
 #endif /* __INTEL_SNPS_PHY_H__ */