arm64: dts: sprd: adding coresight entries to Spreadtrum SC9836

Support only for ETF, FUNNEL, STM are included currently.
Support for ETM, TPIU and the replicator linked to it are not included in
this version patch.

Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi b/arch/arm64/boot/dts/sprd/sc9836.dtsi
index f92f1b45f6d67abc0e022cc77c36479d2f318713..ee34e1a36e0384b2aec4050cc26c429589520804 100644 (file)
--- a/arch/arm64/boot/dts/sprd/sc9836.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9836.dtsi
@@ -45,6 +45,61 @@
                };
        };
 
+       etf@10003000 {
+               compatible = "arm,coresight-tmc", "arm,primecell";
+               reg = <0 0x10003000 0 0x1000>;
+               clocks = <&clk26mhz>;
+               clock-names = "apb_pclk";
+               port {
+                       etf_in: endpoint {
+                               slave-mode;
+                               remote-endpoint = <&funnel_out_port0>;
+                       };
+               };
+       };
+
+       funnel@10001000 {
+               compatible = "arm,coresight-funnel", "arm,primecell";
+               reg = <0 0x10001000 0 0x1000>;
+               clocks = <&clk26mhz>;
+               clock-names = "apb_pclk";
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       /* funnel output port */
+                       port@0 {
+                               reg = <0>;
+                               funnel_out_port0: endpoint {
+                                       remote-endpoint = <&etf_in>;
+                               };
+                       };
+
+                       /* funnel input port 0~3 is reserved for ETMs */
+                       port@1 {
+                               reg = <4>;
+                               funnel_in_port4: endpoint {
+                                       slave-mode;
+                                       remote-endpoint = <&stm_out>;
+                               };
+                       };
+               };
+       };
+
+       stm@10006000 {
+               compatible = "arm,coresight-stm", "arm,primecell";
+               reg = <0 0x10006000 0 0x1000>,
+                     <0 0x01000000 0 0x180000>;
+               reg-names = "stm-base", "stm-stimulus-base";
+               clocks = <&clk26mhz>;
+               clock-names = "apb_pclk";
+               port {
+                       stm_out: endpoint {
+                               remote-endpoint = <&funnel_in_port4>;
+                       };
+               };
+       };
+
        gic: interrupt-controller@12001000 {
                compatible = "arm,gic-400";
                reg = <0 0x12001000 0 0x1000>,