ARM: dts: stm32: OP-TEE async notif interrupt for ST STM32MP15x boards

Define the GIC interrupt (PPI 15) to be used on ST STM32MP15x boards
for OP-TEE async notif.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts
index 306e1bc2a51467addd2a6378f19fda7b14e9f872..847b360f02fccfc3550f1e643a2853705ee5a57a 100644 (file)
--- a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts
+++ b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts
@@ -62,6 +62,11 @@
        reset-names = "mcu_rst", "hold_boot";
 };
 
+&optee {
+       interrupt-parent = <&intc>;
+       interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+};
+
 &rcc {
        compatible = "st,stm32mp1-rcc-secure", "syscon";
        clock-names = "hse", "hsi", "csi", "lse", "lsi";

diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts
index 956da5f26c1c6736ef76f6f19ebb89ee3299b648..43280289759d020f3f6f4629fcd9b7d76a23acf3 100644 (file)
--- a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts
@@ -68,6 +68,11 @@
        reset-names = "mcu_rst", "hold_boot";
 };
 
+&optee {
+       interrupt-parent = <&intc>;
+       interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+};
+
 &rcc {
        compatible = "st,stm32mp1-rcc-secure", "syscon";
        clock-names = "hse", "hsi", "csi", "lse", "lsi";

diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts
index 8e4b0db198c2213f6142917985429ddc62b16ab7..6f27d794d2702c5d87eb5147fd52348327a006bc 100644 (file)
--- a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts
@@ -67,6 +67,11 @@
        reset-names = "mcu_rst", "hold_boot";
 };
 
+&optee {
+       interrupt-parent = <&intc>;
+       interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+};
+
 &rcc {
        compatible = "st,stm32mp1-rcc-secure", "syscon";
        clock-names = "hse", "hsi", "csi", "lse", "lsi";

diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts
index 72b9cab2d990bcbe1e845784b28fdc0a956e5c54..6ae391bffee53a3839429f2423a1aa36a65daf3c 100644 (file)
--- a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts
@@ -72,6 +72,11 @@
        reset-names = "mcu_rst", "hold_boot";
 };
 
+&optee {
+       interrupt-parent = <&intc>;
+       interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+};
+
 &rcc {
        compatible = "st,stm32mp1-rcc-secure", "syscon";
        clock-names = "hse", "hsi", "csi", "lse", "lsi";