bool need_switch_bank;
        struct thermal_bank_cfg bank_data[MAX_NUM_ZONES];
        enum mtk_thermal_version version;
+       u32 apmixed_buffer_ctl_reg;
+       u32 apmixed_buffer_ctl_mask;
+       u32 apmixed_buffer_ctl_set;
 };
 
 struct mtk_thermal {
        .adcpnp = mt7622_adcpnp,
        .sensor_mux_values = mt7622_mux_values,
        .version = MTK_THERMAL_V2,
+       .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON1,
+       .apmixed_buffer_ctl_mask = GENMASK(31, 6) | BIT(3),
+       .apmixed_buffer_ctl_set = BIT(0),
 };
 
 /*
 };
 MODULE_DEVICE_TABLE(of, mtk_thermal_of_match);
 
-static void mtk_thermal_turn_on_buffer(void __iomem *apmixed_base)
+static void mtk_thermal_turn_on_buffer(struct mtk_thermal *mt,
+                                      void __iomem *apmixed_base)
 {
-       int tmp;
+       u32 tmp;
+
+       if (!mt->conf->apmixed_buffer_ctl_reg)
+               return;
 
-       tmp = readl(apmixed_base + APMIXED_SYS_TS_CON1);
-       tmp &= ~(0x37);
-       tmp |= 0x1;
-       writel(tmp, apmixed_base + APMIXED_SYS_TS_CON1);
+       tmp = readl(apmixed_base + mt->conf->apmixed_buffer_ctl_reg);
+       tmp &= mt->conf->apmixed_buffer_ctl_mask;
+       tmp |= mt->conf->apmixed_buffer_ctl_set;
+       writel(tmp, apmixed_base + mt->conf->apmixed_buffer_ctl_reg);
        udelay(200);
 }
 
                goto err_disable_clk_auxadc;
        }
 
-       if (mt->conf->version != MTK_THERMAL_V1) {
-               mtk_thermal_turn_on_buffer(apmixed_base);
+       mtk_thermal_turn_on_buffer(mt, apmixed_base);
+
+       if (mt->conf->version != MTK_THERMAL_V2)
                mtk_thermal_release_periodic_ts(mt, auxadc_base);
-       }
 
        if (mt->conf->version == MTK_THERMAL_V1)
                mt->raw_to_mcelsius = raw_to_mcelsius_v1;