/*
  * Starting with Haswell, DDI port buffers must be programmed with correct
- * values in advance. The buffer values are different for FDI and DP modes,
- * but the HDMI/DVI fields are shared among those. So we program the DDI
- * in either FDI or DP modes only, as HDMI connections will work with both
- * of those
+ * values in advance. This function programs the correct values for
+ * DP/eDP/FDI use cases.
  */
-void intel_prepare_ddi_buffer(struct intel_encoder *encoder)
+void intel_prepare_dp_ddi_buffers(struct intel_encoder *encoder)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        u32 iboost_bit = 0;
-       int i, n_hdmi_entries, n_dp_entries, n_edp_entries,
-           size;
-       int hdmi_level;
-       enum port port;
+       int i, n_dp_entries, n_edp_entries, size;
+       enum port port = intel_ddi_get_encoder_port(encoder);
        const struct ddi_buf_trans *ddi_translations_fdi;
        const struct ddi_buf_trans *ddi_translations_dp;
        const struct ddi_buf_trans *ddi_translations_edp;
-       const struct ddi_buf_trans *ddi_translations_hdmi;
        const struct ddi_buf_trans *ddi_translations;
 
-       port = intel_ddi_get_encoder_port(encoder);
-       hdmi_level = intel_ddi_hdmi_level(dev_priv, port);
-
        if (IS_BROXTON(dev_priv))
                return;
 
                                skl_get_buf_trans_dp(dev_priv, &n_dp_entries);
                ddi_translations_edp =
                                skl_get_buf_trans_edp(dev_priv, &n_edp_entries);
-               ddi_translations_hdmi =
-                               skl_get_buf_trans_hdmi(dev_priv, &n_hdmi_entries);
+
                /* If we're boosting the current, set bit 31 of trans1 */
                if (dev_priv->vbt.ddi_port_info[port].hdmi_boost_level ||
                    dev_priv->vbt.ddi_port_info[port].dp_boost_level)
        } else if (IS_BROADWELL(dev_priv)) {
                ddi_translations_fdi = bdw_ddi_translations_fdi;
                ddi_translations_dp = bdw_ddi_translations_dp;
-
                if (dev_priv->vbt.edp.low_vswing) {
                        ddi_translations_edp = bdw_ddi_translations_edp;
                        n_edp_entries = ARRAY_SIZE(bdw_ddi_translations_edp);
                        ddi_translations_edp = bdw_ddi_translations_dp;
                        n_edp_entries = ARRAY_SIZE(bdw_ddi_translations_dp);
                }
-
-               ddi_translations_hdmi = bdw_ddi_translations_hdmi;
-
                n_dp_entries = ARRAY_SIZE(bdw_ddi_translations_dp);
-               n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
        } else if (IS_HASWELL(dev_priv)) {
                ddi_translations_fdi = hsw_ddi_translations_fdi;
                ddi_translations_dp = hsw_ddi_translations_dp;
                ddi_translations_edp = hsw_ddi_translations_dp;
-               ddi_translations_hdmi = hsw_ddi_translations_hdmi;
                n_dp_entries = n_edp_entries = ARRAY_SIZE(hsw_ddi_translations_dp);
-               n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
        } else {
                WARN(1, "ddi translation table missing\n");
                ddi_translations_edp = bdw_ddi_translations_dp;
                ddi_translations_fdi = bdw_ddi_translations_fdi;
                ddi_translations_dp = bdw_ddi_translations_dp;
-               ddi_translations_hdmi = bdw_ddi_translations_hdmi;
                n_edp_entries = ARRAY_SIZE(bdw_ddi_translations_edp);
                n_dp_entries = ARRAY_SIZE(bdw_ddi_translations_dp);
-               n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
        }
 
        switch (encoder->type) {
                size = n_edp_entries;
                break;
        case INTEL_OUTPUT_DP:
-       case INTEL_OUTPUT_HDMI:
                ddi_translations = ddi_translations_dp;
                size = n_dp_entries;
                break;
                I915_WRITE(DDI_BUF_TRANS_HI(port, i),
                           ddi_translations[i].trans2);
        }
+}
+
+/*
+ * Starting with Haswell, DDI port buffers must be programmed with correct
+ * values in advance. This function programs the correct values for
+ * HDMI/DVI use cases.
+ */
+static void intel_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder)
+{
+       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+       u32 iboost_bit = 0;
+       int n_hdmi_entries, hdmi_level;
+       enum port port = intel_ddi_get_encoder_port(encoder);
+       const struct ddi_buf_trans *ddi_translations_hdmi;
 
-       if (encoder->type != INTEL_OUTPUT_HDMI)
+       if (IS_BROXTON(dev_priv))
                return;
 
+       hdmi_level = intel_ddi_hdmi_level(dev_priv, port);
+
+       if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
+               ddi_translations_hdmi = skl_get_buf_trans_hdmi(dev_priv, &n_hdmi_entries);
+               /* If we're boosting the current, set bit 31 of trans1 */
+               if (dev_priv->vbt.ddi_port_info[port].hdmi_boost_level ||
+                   dev_priv->vbt.ddi_port_info[port].dp_boost_level)
+                       iboost_bit = DDI_BUF_BALANCE_LEG_ENABLE;
+       } else if (IS_BROADWELL(dev_priv)) {
+               ddi_translations_hdmi = bdw_ddi_translations_hdmi;
+               n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
+       } else if (IS_HASWELL(dev_priv)) {
+               ddi_translations_hdmi = hsw_ddi_translations_hdmi;
+               n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi);
+       } else {
+               WARN(1, "ddi translation table missing\n");
+               ddi_translations_hdmi = bdw_ddi_translations_hdmi;
+               n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
+       }
+
        /* Entry 9 is for HDMI: */
        I915_WRITE(DDI_BUF_TRANS_LO(port, 9),
                   ddi_translations_hdmi[hdmi_level].trans1 | iboost_bit);
 
        for_each_encoder_on_crtc(dev, crtc, encoder) {
                WARN_ON(encoder->type != INTEL_OUTPUT_ANALOG);
-               intel_prepare_ddi_buffer(encoder);
+               intel_prepare_dp_ddi_buffers(encoder);
        }
 
        /* Set the FDI_RX_MISC pwrdn lanes and the 2 workarounds listed at the
                intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);
        }
 
-       intel_prepare_ddi_buffer(intel_encoder);
-
        if (type == INTEL_OUTPUT_EDP) {
                struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
                intel_edp_panel_on(intel_dp);
        if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {
                struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
+               intel_prepare_dp_ddi_buffers(intel_encoder);
+
                intel_dp_set_link_params(intel_dp, crtc->config);
 
                intel_ddi_init_dp_buf_reg(intel_encoder);
                struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
                int level = intel_ddi_hdmi_level(dev_priv, port);
 
+               intel_prepare_hdmi_ddi_buffers(intel_encoder);
+
                if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
                        skl_ddi_set_iboost(intel_encoder, level);
                else if (IS_BROXTON(dev_priv))