Merge branch 'pci/controller/microchip'

- Move PLDA XpressRICH generic DT binding properties to
  plda,xpressrich3-axi-common.yaml where they can be shared across
  PLDA-based drivers (Minda Chen)

- Create a drivers/pci/controller/plda/ directory for PLDA-based drivers
  and move pcie-microchip-host.c there (Minda Chen)

- Move PLDA generic macros to pcie-plda.h where they can be shared across
  drivers (Minda Chen)

- Extract PLDA generic structures from pcie-microchip-host.c, rename them
  to be generic, and move them to pcie-plda-host.c where they can be shared
  across drivers (Minda Chen)

- Add a .request_event_irq() callback for requesting device-specific
  interrupts in addition to PLDA-generic interrupts (Minda Chen)

- Add DT binding and driver for the StarFive JH7110 SoC, based on PLDA IP
  (Minda Chen)

* pci/controller/microchip:
  PCI: starfive: Add JH7110 PCIe controller
  dt-bindings: PCI: Add StarFive JH7110 PCIe controller
  PCI: Add PCIE_RESET_CONFIG_DEVICE_WAIT_MS waiting time value
  PCI: plda: Pass pci_host_bridge to plda_pcie_setup_iomems()
  PCI: plda: Add host init/deinit and map bus functions
  PCI: plda: Add event bitmap field to struct plda_pcie_rp
  PCI: microchip: Move IRQ functions to pcie-plda-host.c
  PCI: microchip: Add event irqchip field to host port and add PLDA irqchip
  PCI: microchip: Add get_events() callback and PLDA get_event()
  PCI: microchip: Add INTx and MSI event num to struct plda_event
  PCI: microchip: Add request_event_irq() callback function
  PCI: microchip: Add num_events field to struct plda_pcie_rp
  PCI: microchip: Rename interrupt related functions
  PCI: microchip: Move PLDA functions to pcie-plda-host.c
  PCI: microchip: Rename PLDA functions to be generic
  PCI: microchip: Move PLDA structures to plda-pcie.h
  PCI: microchip: Rename PLDA structures to be generic
  PCI: microchip: Add bridge_addr field to struct mc_pcie
  PCI: microchip: Move PLDA IP register macros to pcie-plda.h
  PCI: microchip: Move pcie-microchip-host.c to PLDA directory
  dt-bindings: PCI: Add PLDA XpressRICH PCIe host common properties

# Conflicts:
#	drivers/pci/pci.h

diff --cc drivers/pci/pci.h
index 089ed4029a86c58dedcad8e442c5daccf5e3af72,a4477594c5257a88faa50518a6a97092eebf7c44..cd18205a5d0dc0d3086c7b9b438f500da4475a26
--- 1/drivers/pci/pci.h
--- 2/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@@ -22,27 -22,21 +22,42 @@@
   */
  #define PCIE_PME_TO_L2_TIMEOUT_US     10000
  
+ /*
+  * PCIe r6.0, sec 6.6.1 <Conventional Reset>
+  *
+  * - "With a Downstream Port that does not support Link speeds greater
+  *    than 5.0 GT/s, software must wait a minimum of 100 ms following exit
+  *    from a Conventional Reset before sending a Configuration Request to
+  *    the device immediately below that Port."
+  *
+  * - "With a Downstream Port that supports Link speeds greater than
+  *    5.0 GT/s, software must wait a minimum of 100 ms after Link training
+  *    completes before sending a Configuration Request to the device
+  *    immediately below that Port."
+  */
+ #define PCIE_RESET_CONFIG_DEVICE_WAIT_MS      100
+ 
 +/* Message Routing (r[2:0]); PCIe r6.0, sec 2.2.8 */
 +#define PCIE_MSG_TYPE_R_RC    0
 +#define PCIE_MSG_TYPE_R_ADDR  1
 +#define PCIE_MSG_TYPE_R_ID    2
 +#define PCIE_MSG_TYPE_R_BC    3
 +#define PCIE_MSG_TYPE_R_LOCAL 4
 +#define PCIE_MSG_TYPE_R_GATHER        5
 +
 +/* Power Management Messages; PCIe r6.0, sec 2.2.8.2 */
 +#define PCIE_MSG_CODE_PME_TURN_OFF    0x19
 +
 +/* INTx Mechanism Messages; PCIe r6.0, sec 2.2.8.1 */
 +#define PCIE_MSG_CODE_ASSERT_INTA     0x20
 +#define PCIE_MSG_CODE_ASSERT_INTB     0x21
 +#define PCIE_MSG_CODE_ASSERT_INTC     0x22
 +#define PCIE_MSG_CODE_ASSERT_INTD     0x23
 +#define PCIE_MSG_CODE_DEASSERT_INTA   0x24
 +#define PCIE_MSG_CODE_DEASSERT_INTB   0x25
 +#define PCIE_MSG_CODE_DEASSERT_INTC   0x26
 +#define PCIE_MSG_CODE_DEASSERT_INTD   0x27
 +
  extern const unsigned char pcie_link_speed[];
  extern bool pci_early_dump;