drm/i915/fbc: Pass i915 instead of FBC instance to FBC underrun stuff

The underrun code doesn't need to know any details about FBC, so
just pass in the whole device rather than a specific FBC instance.
We could make this a bit more fine grained by also passing in the
pipe to intel_fbc_handle_fifo_underrun_irq() and letting the FBC
code figure which FBC instance (if any) is active on said pipe.
But that seems a bit overkill for this so don't bother.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-11-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index acf70ae66a2921202a087465956992cfbfd2599c..3e456e5950103bf2ed3d3fdfb68e13282269cf1a 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -2044,9 +2044,7 @@ i915_fifo_underrun_reset_write(struct file *filp,
                        return ret;
        }
 
-       ret = intel_fbc_reset_underrun(&dev_priv->fbc);
-       if (ret)
-               return ret;
+       intel_fbc_reset_underrun(dev_priv);
 
        return cnt;
 }

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 0bef3b94867061f35d1f6333578cabb6abc095d5..00c93040529e90e7f132a9df6b0989934ef90573 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1547,21 +1547,21 @@ out:
 
 /*
  * intel_fbc_reset_underrun - reset FBC fifo underrun status.
- * @fbc: The FBC instance
+ * @i915: the i915 device
  *
  * See intel_fbc_handle_fifo_underrun_irq(). For automated testing we
  * want to re-enable FBC after an underrun to increase test coverage.
  */
-int intel_fbc_reset_underrun(struct intel_fbc *fbc)
+void intel_fbc_reset_underrun(struct drm_i915_private *i915)
 {
-       struct drm_i915_private *i915 = fbc->i915;
-       int ret;
+       struct intel_fbc *fbc = &i915->fbc;
+
+       if (!HAS_FBC(i915))
+               return;
 
        cancel_work_sync(&fbc->underrun_work);
 
-       ret = mutex_lock_interruptible(&fbc->lock);
-       if (ret)
-               return ret;
+       mutex_lock(&fbc->lock);
 
        if (fbc->underrun_detected) {
                drm_dbg_kms(&i915->drm,
@@ -1571,13 +1571,11 @@ int intel_fbc_reset_underrun(struct intel_fbc *fbc)
 
        fbc->underrun_detected = false;
        mutex_unlock(&fbc->lock);
-
-       return 0;
 }
 
 /**
  * intel_fbc_handle_fifo_underrun_irq - disable FBC when we get a FIFO underrun
- * @fbc: The FBC instance
+ * @i915: i915 device
  *
  * Without FBC, most underruns are harmless and don't really cause too many
  * problems, except for an annoying message on dmesg. With FBC, underruns can
@@ -1589,9 +1587,11 @@ int intel_fbc_reset_underrun(struct intel_fbc *fbc)
  *
  * This function is called from the IRQ handler.
  */
-void intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
+void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915)
 {
-       if (!HAS_FBC(fbc->i915))
+       struct intel_fbc *fbc = &i915->fbc;
+
+       if (!HAS_FBC(i915))
                return;
 
        /* There's no guarantee that underrun_detected won't be set to true

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
index 74492e05a1c9d75e4f02f640ff7de729a7d9d989..36e9e5f93bcbdce14f5a5cd68e9423cea5da07c5 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.h
+++ b/drivers/gpu/drm/i915/display/intel_fbc.h
@@ -35,8 +35,8 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
                          enum fb_op_origin origin);
 void intel_fbc_flush(struct drm_i915_private *dev_priv,
                     unsigned int frontbuffer_bits, enum fb_op_origin origin);
-void intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc);
-int intel_fbc_reset_underrun(struct intel_fbc *fbc);
+void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915);
+void intel_fbc_reset_underrun(struct drm_i915_private *i915);
 int intel_fbc_set_false_color(struct intel_fbc *fbc, bool enable);
 
 #endif /* __INTEL_FBC_H__ */

diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
index 98b401d60b312126a242805d77cc2cfcd25ea33e..76045ce847392f772146bf3a66a167e75ccdf5ab 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
@@ -434,7 +434,7 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
                        drm_err(&dev_priv->drm, "CPU pipe %c FIFO underrun\n", pipe_name(pipe));
        }
 
-       intel_fbc_handle_fifo_underrun_irq(&dev_priv->fbc);
+       intel_fbc_handle_fifo_underrun_irq(dev_priv);
 }
 
 /**