target-mips: fix indentation

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index d3dab33a36a99abae781ce6abb84c028837ce756..83734b1234a7c4f87de0af9ed5a9975ffdcaaa04 100644 (file)
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -1169,7 +1169,7 @@ void helper_mtc0_status (target_ulong arg1)
         case MIPS_HFLAG_SM: qemu_log(", SM\n"); break;
         case MIPS_HFLAG_KM: qemu_log("\n"); break;
         default: cpu_abort(env, "Invalid MMU mode!\n"); break;
-       }
+        }
     }
     cpu_mips_update_irq(env);
 }

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 79ff84609707366b10c1d0d25e84619e3cdf8bd2..7bae5414c4dd167e5e4d5e7a09df11ddc3978fc8 100644 (file)
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1624,7 +1624,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
             tcg_temp_free(t2);
             tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1);
             tcg_temp_free(t1);
-           /* operands of different sign, first operand and result different sign */
+            /* operands of different sign, first operand and result different sign */
             generate_exception(ctx, EXCP_OVERFLOW);
             gen_set_label(l1);
             gen_store_gpr(t0, rd);
@@ -1700,7 +1700,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
             tcg_temp_free(t2);
             tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1);
             tcg_temp_free(t1);
-           /* operands of different sign, first operand and result different sign */
+            /* operands of different sign, first operand and result different sign */
             generate_exception(ctx, EXCP_OVERFLOW);
             gen_set_label(l1);
             gen_store_gpr(t0, rd);