uint64_t incr, entry_end, pe_start;
                struct amdgpu_bo *pt;
 
-               if (flags & AMDGPU_PTE_VALID) {
+               if (flags & (AMDGPU_PTE_VALID | AMDGPU_PTE_PRT)) {
                        /* make sure that the page tables covering the
                         * address range are actually allocated
                         */
                goto error_unlock;
        }
 
-       if (flags & AMDGPU_PTE_VALID) {
+       if (flags & (AMDGPU_PTE_VALID | AMDGPU_PTE_PRT)) {
                struct amdgpu_bo *root = vm->root.base.bo;
 
                if (!dma_fence_is_signaled(vm->last_direct))
                                        AMDGPU_GPU_PAGES_IN_CPU_PAGE;
                        }
 
-               } else if (flags & AMDGPU_PTE_VALID) {
+               } else if (flags & (AMDGPU_PTE_VALID | AMDGPU_PTE_PRT)) {
                        addr += bo_adev->vm_manager.vram_base_offset;
                        addr += pfn << PAGE_SHIFT;
                }