]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
drm/amdgpu: enable GFX IP v11.5.0 CG and PG support
authorLi Ma <li.ma@amd.com>
Wed, 2 Aug 2023 08:39:51 +0000 (16:39 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 13 Oct 2023 15:00:15 +0000 (11:00 -0400)
Add CG support for GFX/MC/HDP/ATHUB/IH/BIF.
Add PG support for GFX.

Signed-off-by: Li Ma <li.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/athub_v3_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
drivers/gpu/drm/amd/amdgpu/soc21.c

index 5a318bc03d23e8add6e59bb86871c1a686be11c3..f0737fb3a999e03a44eb3c08f6e0099e3326c929 100644 (file)
@@ -103,6 +103,7 @@ int athub_v3_0_set_clockgating(struct amdgpu_device *adev,
        case IP_VERSION(3, 0, 0):
        case IP_VERSION(3, 0, 1):
        case IP_VERSION(3, 0, 2):
+       case IP_VERSION(3, 3, 0):
                athub_v3_0_update_medium_grain_clock_gating(adev,
                                state == AMD_CG_STATE_GATE);
                athub_v3_0_update_medium_grain_light_sleep(adev,
index 9c4562bda8cdbf436ab58f41c4d9ddfc6742ea4a..27b224b0688a2cc831814ab072a71170bcc266c0 100644 (file)
@@ -5027,6 +5027,7 @@ static void gfx_v11_cntl_power_gating(struct amdgpu_device *adev, bool enable)
                switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
                case IP_VERSION(11, 0, 1):
                case IP_VERSION(11, 0, 4):
+               case IP_VERSION(11, 5, 0):
                        WREG32_SOC15(GC, 0, regRLC_PG_DELAY_3, RLC_PG_DELAY_3_DEFAULT_GC_11_0_1);
                        break;
                default:
@@ -5061,6 +5062,7 @@ static int gfx_v11_0_set_powergating_state(void *handle,
                break;
        case IP_VERSION(11, 0, 1):
        case IP_VERSION(11, 0, 4):
+       case IP_VERSION(11, 5, 0):
                if (!enable)
                        amdgpu_gfx_off_ctrl(adev, false);
 
@@ -5091,6 +5093,7 @@ static int gfx_v11_0_set_clockgating_state(void *handle,
        case IP_VERSION(11, 0, 2):
        case IP_VERSION(11, 0, 3):
        case IP_VERSION(11, 0, 4):
+       case IP_VERSION(11, 5, 0):
                gfx_v11_0_update_gfx_clock_gating(adev,
                                state ==  AMD_CG_STATE_GATE);
                break;
index 6fcc4f7be1176e3c305cf5e15d2af3e71caae1bc..df7462cec6ab2606da31f54b1cd6a51c223b5125 100644 (file)
@@ -689,11 +689,27 @@ static int soc21_common_early_init(void *handle)
                        AMD_PG_SUPPORT_JPEG;
                adev->external_rev_id = adev->rev_id + 0x80;
                break;
-
-
        case IP_VERSION(11, 5, 0):
                adev->cg_flags = AMD_CG_SUPPORT_VCN_MGCG |
-                       AMD_CG_SUPPORT_JPEG_MGCG;
+                       AMD_CG_SUPPORT_JPEG_MGCG |
+                       AMD_CG_SUPPORT_GFX_CGCG |
+                       AMD_CG_SUPPORT_GFX_CGLS |
+                       AMD_CG_SUPPORT_GFX_MGCG |
+                       AMD_CG_SUPPORT_GFX_FGCG |
+                       AMD_CG_SUPPORT_REPEATER_FGCG |
+                       AMD_CG_SUPPORT_GFX_PERF_CLK     |
+                       AMD_CG_SUPPORT_GFX_3D_CGCG |
+                       AMD_CG_SUPPORT_GFX_3D_CGLS      |
+                       AMD_CG_SUPPORT_MC_MGCG |
+                       AMD_CG_SUPPORT_MC_LS |
+                       AMD_CG_SUPPORT_HDP_LS |
+                       AMD_CG_SUPPORT_HDP_DS |
+                       AMD_CG_SUPPORT_HDP_SD |
+                       AMD_CG_SUPPORT_ATHUB_MGCG |
+                       AMD_CG_SUPPORT_ATHUB_LS |
+                       AMD_CG_SUPPORT_IH_CG |
+                       AMD_CG_SUPPORT_BIF_MGCG |
+                       AMD_CG_SUPPORT_BIF_LS;
                adev->pg_flags = AMD_PG_SUPPORT_VCN_DPG |
                        AMD_PG_SUPPORT_VCN |
                        AMD_PG_SUPPORT_JPEG |