dt-bindings: mmc: sdhci-of-arasan: Add new compatible for Intel LGM eMMC

Add a new compatible to use the sdhc-arasan host controller driver
with the eMMC PHY on Intel's Lightning Mountain SoC.

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
index 1edbb049cccb10cead46f0c969ccd08de684b11f..7ca0aa7ccc0bfd73dd0303a2a8181bca2acb8d37 100644 (file)
--- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
@@ -17,6 +17,8 @@ Required Properties:
       For this device it is strongly suggested to include arasan,soc-ctl-syscon.
     - "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY
        Note: This binding has been deprecated and moved to [5].
+    - "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY
+      For this device it is strongly suggested to include arasan,soc-ctl-syscon.
 
   [5] Documentation/devicetree/bindings/mmc/sdhci-am654.txt
 
@@ -80,3 +82,18 @@ Example:
                phy-names = "phy_arasan";
                #clock-cells = <0>;
        };
+
+       emmc: sdhci@ec700000 {
+               compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1";
+               reg = <0xec700000 0x300>;
+               interrupt-parent = <&ioapic1>;
+               interrupts = <44 1>;
+               clocks = <&cgu0 LGM_CLK_EMMC5>, <&cgu0 LGM_CLK_NGI>,
+                        <&cgu0 LGM_GCLK_EMMC>;
+               clock-names = "clk_xin", "clk_ahb", "gate";
+               clock-output-names = "emmc_cardclock";
+               #clock-cells = <0>;
+               phys = <&emmc_phy>;
+               phy-names = "phy_arasan";
+               arasan,soc-ctl-syscon = <&sysconf>;
+       };