assigned-clock-rates = <32768>;
        };
 
+       codec: codec@ff560000 {
+               compatible = "rockchip,rk3308-codec";
+               reg = <0x0 0xff560000 0x0 0x10000>;
+               rockchip,grf = <&grf>;
+               clock-names = "mclk_tx", "mclk_rx", "hclk";
+               clocks = <&cru SCLK_I2S2_8CH_TX_OUT>,
+                        <&cru SCLK_I2S2_8CH_RX_OUT>,
+                        <&cru PCLK_ACODEC>;
+               reset-names = "codec-reset";
+               resets = <&cru SRST_ACODEC_P>;
+               #sound-dai-cells = <0>;
+               status = "disabled";
+       };
+
        gic: interrupt-controller@ff580000 {
                compatible = "arm,gic-400";
                reg = <0x0 0xff581000 0x0 0x1000>,