arm64: elf: use cpuid_feature_extract_field for hwcap detection

cpuid_feature_extract_field takes care of the fiddly ID register
field sign-extension, so use that instead of rolling our own version.

Signed-off-by: Will Deacon <will.deacon@arm.com>

diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index b2f9895ecf7b5af6784f8d5a5232d55abaf7da60..be65ecc89e82a7e38c73eb23960d9cf39ec9c53b 100644 (file)
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -223,7 +223,8 @@ void __init up_late_init(void)
 
 static void __init setup_processor(void)
 {
-       u64 features, block;
+       u64 features;
+       s64 block;
        u32 cwg;
        int cls;
 
@@ -253,8 +254,8 @@ static void __init setup_processor(void)
         * for non-negative values. Negative values are reserved.
         */
        features = read_cpuid(ID_AA64ISAR0_EL1);
-       block = (features >> 4) & 0xf;
-       if (!(block & 0x8)) {
+       block = cpuid_feature_extract_field(features, 4);
+       if (block > 0) {
                switch (block) {
                default:
                case 2:
@@ -266,20 +267,17 @@ static void __init setup_processor(void)
                }
        }
 
-       block = (features >> 8) & 0xf;
-       if (block && !(block & 0x8))
+       if (cpuid_feature_extract_field(features, 8) > 0)
                elf_hwcap |= HWCAP_SHA1;
 
-       block = (features >> 12) & 0xf;
-       if (block && !(block & 0x8))
+       if (cpuid_feature_extract_field(features, 12) > 0)
                elf_hwcap |= HWCAP_SHA2;
 
-       block = (features >> 16) & 0xf;
-       if (block && !(block & 0x8))
+       if (cpuid_feature_extract_field(features, 16) > 0)
                elf_hwcap |= HWCAP_CRC32;
 
-       block = (features >> 20) & 0xf;
-       if (!(block & 0x8)) {
+       block = cpuid_feature_extract_field(features, 20);
+       if (block > 0) {
                switch (block) {
                default:
                case 2:
@@ -294,11 +292,11 @@ static void __init setup_processor(void)
 #ifdef CONFIG_COMPAT
        /*
         * ID_ISAR5_EL1 carries similar information as above, but pertaining to
-        * the Aarch32 32-bit execution state.
+        * the AArch32 32-bit execution state.
         */
        features = read_cpuid(ID_ISAR5_EL1);
-       block = (features >> 4) & 0xf;
-       if (!(block & 0x8)) {
+       block = cpuid_feature_extract_field(features, 4);
+       if (block > 0) {
                switch (block) {
                default:
                case 2:
@@ -310,16 +308,13 @@ static void __init setup_processor(void)
                }
        }
 
-       block = (features >> 8) & 0xf;
-       if (block && !(block & 0x8))
+       if (cpuid_feature_extract_field(features, 8) > 0)
                compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA1;
 
-       block = (features >> 12) & 0xf;
-       if (block && !(block & 0x8))
+       if (cpuid_feature_extract_field(features, 12) > 0)
                compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA2;
 
-       block = (features >> 16) & 0xf;
-       if (block && !(block & 0x8))
+       if (cpuid_feature_extract_field(features, 16) > 0)
                compat_elf_hwcap2 |= COMPAT_HWCAP2_CRC32;
 #endif
 }