]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmask
authorNeil Armstrong <narmstrong@baylibre.com>
Mon, 1 Apr 2019 07:48:01 +0000 (09:48 +0200)
committerKevin Hilman <khilman@baylibre.com>
Tue, 16 Apr 2019 18:09:17 +0000 (11:09 -0700)
The register bitmask to power on/off the VPU memories was incorectly set
to 0x2 instead of 0x3. While still working, let's use the recommended
vendor value instead.

Fixes: 75fcb5ca4b46 ("soc: amlogic: add Meson GX VPU Domains driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
drivers/soc/amlogic/meson-gx-pwrc-vpu.c

index 6289965c42e98cbe6c13611bf8dd7c29ddb17c80..05421d029dff9bd3fc3c4e64927ef1aca8e84a52 100644 (file)
@@ -54,12 +54,12 @@ static int meson_gx_pwrc_vpu_power_off(struct generic_pm_domain *genpd)
        /* Power Down Memories */
        for (i = 0; i < 32; i += 2) {
                regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
-                                  0x2 << i, 0x3 << i);
+                                  0x3 << i, 0x3 << i);
                udelay(5);
        }
        for (i = 0; i < 32; i += 2) {
                regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
-                                  0x2 << i, 0x3 << i);
+                                  0x3 << i, 0x3 << i);
                udelay(5);
        }
        for (i = 8; i < 16; i++) {
@@ -108,13 +108,13 @@ static int meson_gx_pwrc_vpu_power_on(struct generic_pm_domain *genpd)
        /* Power Up Memories */
        for (i = 0; i < 32; i += 2) {
                regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
-                                  0x2 << i, 0);
+                                  0x3 << i, 0);
                udelay(5);
        }
 
        for (i = 0; i < 32; i += 2) {
                regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
-                                  0x2 << i, 0);
+                                  0x3 << i, 0);
                udelay(5);
        }