cxl/pci: Add CXL Type 1/2 support to cxl_dvsec_rr_decode()

In cxl_dvsec_rr_decode() the pci driver expects to retrieve a cxlds,
struct cxl_dev_state, from the driver_data field of struct device.
While that works for Type 3, drivers for Type 1/2 devices may not
put a cxlds in the driver_data field.

In preparation for supporting Type 1/2 devices, replace parameter
'struct device' with 'struct cxl_dev_state' in cxl_dvsec_rr_decode().

Remove the unused parameter 'cxl_port' in cxl_dvsec_rr_decode().

Signed-off-by: Alejandro Lucero <alucerop@amd.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Link: https://patch.msgid.link/20241203162112.5088-1-alucerop@amd.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>

diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
index 9d58ab9d33c554e05ddfa2610269e6d08bfaa8e9..b3aac9964e0d9491b0c8132292f6d6999a6c55f6 100644 (file)
--- a/drivers/cxl/core/pci.c
+++ b/drivers/cxl/core/pci.c
@@ -291,11 +291,11 @@ static int devm_cxl_enable_hdm(struct device *host, struct cxl_hdm *cxlhdm)
        return devm_add_action_or_reset(host, disable_hdm, cxlhdm);
 }
 
-int cxl_dvsec_rr_decode(struct device *dev, struct cxl_port *port,
+int cxl_dvsec_rr_decode(struct cxl_dev_state *cxlds,
                        struct cxl_endpoint_dvsec_info *info)
 {
-       struct pci_dev *pdev = to_pci_dev(dev);
-       struct cxl_dev_state *cxlds = pci_get_drvdata(pdev);
+       struct pci_dev *pdev = to_pci_dev(cxlds->dev);
+       struct device *dev = cxlds->dev;
        int hdm_count, rc, i, ranges = 0;
        int d = cxlds->cxl_dvsec;
        u16 cap, ctrl;

diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index f6015f24ad3818966571e0aaea2b974f09af5f7c..fdac3ddb8635b323769ee6089574213ad9792d72 100644 (file)
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -821,7 +821,8 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,
 int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
                                struct cxl_endpoint_dvsec_info *info);
 int devm_cxl_add_passthrough_decoder(struct cxl_port *port);
-int cxl_dvsec_rr_decode(struct device *dev, struct cxl_port *port,
+struct cxl_dev_state;
+int cxl_dvsec_rr_decode(struct cxl_dev_state *cxlds,
                        struct cxl_endpoint_dvsec_info *info);
 
 bool is_cxl_region(struct device *dev);

diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c
index 4c83f6a22e584f1f248807c7fa4fe932d6f11d67..d2bfd1ff5492405be4324b4721308f8f2132496e 100644 (file)
--- a/drivers/cxl/port.c
+++ b/drivers/cxl/port.c
@@ -98,7 +98,7 @@ static int cxl_endpoint_port_probe(struct cxl_port *port)
        struct cxl_port *root;
        int rc;
 
-       rc = cxl_dvsec_rr_decode(cxlds->dev, port, &info);
+       rc = cxl_dvsec_rr_decode(cxlds, &info);
        if (rc < 0)
                return rc;
 

diff --git a/tools/testing/cxl/test/mock.c b/tools/testing/cxl/test/mock.c
index 450c7566c33f3633428f04d8b45815a826ae8b1c..af2594e4f35d6e7278bd640d1405eb6429cedef9 100644 (file)
--- a/tools/testing/cxl/test/mock.c
+++ b/tools/testing/cxl/test/mock.c
@@ -228,16 +228,16 @@ int __wrap_cxl_hdm_decode_init(struct cxl_dev_state *cxlds,
 }
 EXPORT_SYMBOL_NS_GPL(__wrap_cxl_hdm_decode_init, "CXL");
 
-int __wrap_cxl_dvsec_rr_decode(struct device *dev, struct cxl_port *port,
+int __wrap_cxl_dvsec_rr_decode(struct cxl_dev_state *cxlds,
                               struct cxl_endpoint_dvsec_info *info)
 {
        int rc = 0, index;
        struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);
 
-       if (ops && ops->is_mock_dev(dev))
+       if (ops && ops->is_mock_dev(cxlds->dev))
                rc = 0;
        else
-               rc = cxl_dvsec_rr_decode(dev, port, info);
+               rc = cxl_dvsec_rr_decode(cxlds, info);
        put_cxl_mock_ops(index);
 
        return rc;