Modifications for 0.9.0:
======================================================================
+* Added support for DOS partitions
+
* Fix get_bus_freq() for ppc4xx - returned MHz instead of Hz
(Patch by Anne-Sophie Harnois, 27 Mar 2001)
SIU Watchdog feature is enabled in the SYPCR
register.
+- Partition Support:
+ CONFIG_MAC_PARTITION and/or CONFIG_DOS_PARTITION
+
+ If IDE harddisk support is enabled (CFG_CMD_IDE) you
+ must configure support for at least one partition
+ type as well.
Configuration Settings:
LIB = lib$(BOARD).a
-OBJS = $(BOARD).o flash.o
+OBJS = $(BOARD).o flash.o eeprom.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $^
#
TEXT_BASE = 0x40000000
+#TEXT_BASE = 0x41000000
--- /dev/null
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <ppcboot.h>
+#include <mpc8xx.h>
+
+/*-----------------------------------------------------------------------
+ * Definitions
+ */
+
+#define PB_SCL 0x00000020 /* PB 26 */
+#define PB_SDA 0x00000010 /* PB 27 */
+#define I2C_ACK 0 /* PB_SDA level to ack a byte */
+#define I2C_NOACK 1 /* PB_SDA level to noack a byte */
+
+#define SET_PB_BIT(bit) do { \
+ immr->im_cpm.cp_pbdir |= bit; /* output */ \
+ immr->im_cpm.cp_pbdat |= bit; /* set 1 */ \
+ udelay (5); \
+ } while (0)
+
+#define RESET_PB_BIT(bit) do { \
+ immr->im_cpm.cp_pbdir |= bit; /* output */ \
+ immr->im_cpm.cp_pbdat &= ~bit; /* set 0 */ \
+ udelay (5); \
+ } while (0)
+
+#define RESET_PB_BIT1(bit) do { \
+ immr->im_cpm.cp_pbdir |= bit; /* output */ \
+ immr->im_cpm.cp_pbdat &= ~bit; /* set 0 */ \
+ udelay (1); \
+ } while (0)
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static void send_start (void);
+static void send_stop (void);
+static void send_ack (int);
+static void rcv_ack (void);
+static void send_data_1 (void);
+static void send_data_0 (void);
+static void read_addr (uchar dev_id, uchar addr);
+static void write_addr (uchar dev_id, uchar addr);
+static int read_bit (void);
+static uchar read_byte (int);
+static void write_byte (uchar byte);
+
+/*-----------------------------------------------------------------------
+ * START: High -> Low on SDA while SCL is High
+ */
+static void send_start (void)
+{
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+
+ SET_PB_BIT (PB_SCL);
+ RESET_PB_BIT (PB_SDA);
+}
+
+/*-----------------------------------------------------------------------
+ * STOP: Low -> High on SDA while SCL is High
+ */
+static void send_stop (void)
+{
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+
+ RESET_PB_BIT (PB_SDA);
+ SET_PB_BIT (PB_SCL);
+ SET_PB_BIT (PB_SDA);
+ udelay (5);
+}
+
+/*-----------------------------------------------------------------------
+ * ack should be I2C_ACK or I2C_NOACK
+ */
+static void send_ack (int ack)
+{
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+
+ RESET_PB_BIT (PB_SCL);
+ if (ack == I2C_ACK)
+ RESET_PB_BIT (PB_SDA);
+ else
+ SET_PB_BIT (PB_SDA);
+ SET_PB_BIT (PB_SCL);
+ udelay (5);
+ RESET_PB_BIT (PB_SCL);
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void rcv_ack (void)
+{
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+
+ RESET_PB_BIT (PB_SCL);
+
+ immr->im_cpm.cp_pbdir &= ~PB_SDA; /* input */
+ udelay (10);
+ while (immr->im_cpm.cp_pbdat & PB_SDA)
+ ;
+ udelay (5);
+ SET_PB_BIT (PB_SCL);
+ RESET_PB_BIT (PB_SCL);
+ SET_PB_BIT (PB_SDA);
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void send_data_1 (void)
+{
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+
+ RESET_PB_BIT1(PB_SCL);
+ SET_PB_BIT (PB_SDA);
+ SET_PB_BIT (PB_SCL);
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void send_data_0 (void)
+{
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+
+ RESET_PB_BIT1(PB_SCL);
+ RESET_PB_BIT (PB_SDA);
+ SET_PB_BIT (PB_SCL);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+static void read_addr (uchar dev_id, uchar addr)
+{
+ int i;
+
+ addr = ((dev_id | addr) << 1) | 0x01;
+ for (i=0; i<8; ++i) {
+ if (addr & 0x80) {
+ send_data_1 ();
+ } else {
+ send_data_0 ();
+ }
+ addr <<= 1;
+ }
+
+ rcv_ack ();
+}
+
+/*-----------------------------------------------------------------------
+ * addr & 0xF0 -> Device Identifier
+ * addr & 0x0E -> bank_num or device address << 1
+ * addr & 0x01 -> 1 = read, 0 = write
+ */
+static void write_addr (uchar dev_id, uchar addr)
+{
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+
+ addr = (dev_id | addr) << 1;
+
+ for (;;) {
+ uchar a = addr;
+ uint i;
+
+ send_start ();
+
+ for (i=0; i<8; ++i) {
+ if (a & 0x80) {
+ send_data_1 ();
+ } else {
+ send_data_0 ();
+ }
+ a <<= 1;
+ }
+
+ RESET_PB_BIT (PB_SCL);
+
+ immr->im_cpm.cp_pbdir &= ~PB_SDA; /* input */
+ udelay (10);
+
+ i = immr->im_cpm.cp_pbdat;
+ udelay (5);
+ SET_PB_BIT (PB_SCL);
+ RESET_PB_BIT (PB_SCL);
+ SET_PB_BIT (PB_SDA);
+
+ if ((i & PB_SDA) == 0)
+ break;
+
+ send_stop();
+ }
+}
+
+/*-----------------------------------------------------------------------
+ */
+static int read_bit (void)
+{
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+ int bit;
+
+ RESET_PB_BIT (PB_SCL);
+ SET_PB_BIT (PB_SCL);
+ bit = (immr->im_cpm.cp_pbdat & PB_SDA) ? 1 : 0;
+ return (bit);
+}
+
+/*-----------------------------------------------------------------------
+ * if last == 0, ACK the byte so can continue reading
+ * else NO ACK to end the read
+ */
+static uchar read_byte (int last)
+{
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+ uchar byte = 0;
+ int i;
+
+ immr->im_cpm.cp_pbdir &= ~PB_SDA; /* input */
+ udelay (5);
+
+ for (i=0; i<8; ++i) {
+ byte = (byte << 1) | read_bit();
+ }
+ if (!last)
+ send_ack (I2C_ACK);
+ else
+ send_ack (I2C_NOACK);
+
+ return byte;
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void write_byte (uchar byte)
+{
+ int i;
+ for (i=0; i<8; ++i) {
+ if (byte & 0x80) {
+ send_data_1 ();
+ } else {
+ send_data_0 ();
+ }
+ byte <<= 1;
+ }
+ rcv_ack();
+}
+
+/*-----------------------------------------------------------------------
+ */
+void eeprom_init (void)
+{
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+
+ immr->im_cpm.cp_pbpar &= ~(PB_SCL | PB_SDA); /* GPIO */
+ immr->im_cpm.cp_pbodr |= (PB_SCL | PB_SDA); /* Open Drain Output */
+
+ RESET_PB_BIT (PB_SCL);
+ RESET_PB_BIT (PB_SDA);
+ SET_PB_BIT (PB_SCL);
+ SET_PB_BIT (PB_SDA); /* stop condition */
+ udelay (25);
+}
+
+/*-----------------------------------------------------------------------
+ *
+ * for CONFIG_I2C_X defined (16-bit EEPROM address) offset is
+ * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
+ *
+ * for CONFIG_I2C_X not defined (8-bit EEPROM page address) offset is
+ * 0x00000nxx for EEPROM address selectors and page number at n.
+ */
+void eeprom_read (unsigned offset, uchar *buffer, unsigned cnt)
+{
+ unsigned i, blk_off, blk_num;
+ int last;
+
+ i = 0;
+ while (i<cnt) {
+#ifndef CONFIG_I2C_X
+ blk_num = (offset + i) >> 8;
+ blk_off = (offset + i) & 0xFF;
+ write_addr (CFG_EEPROM_ADDR, blk_num);
+ write_byte (blk_off);
+#else
+ blk_num = (offset + i) >> 16; /* addr selectors */
+ blk_off = (offset + i) & 0xFFFF;/* 16-bit address in EEPROM */
+
+ write_addr (CFG_EEPROM_ADDR, blk_num);
+ write_byte (blk_off >> 8); /* upper address octet */
+ write_byte (blk_off & 0xff); /* lower address octet */
+#endif /* CONFIG_I2C_X */
+
+ send_start ();
+ read_addr (CFG_EEPROM_ADDR, blk_num);
+
+ /* Read data until done or would cross a page boundary.
+ * We must write the address again when changing pages
+ * because the next page may be in a different device.
+ */
+ do {
+ ++i;
+ last = (i == cnt || ((offset + i) & 0xFF) == 0);
+ *buffer++ = read_byte(last);
+ } while (!last);
+ send_stop ();
+ }
+}
+
+/*-----------------------------------------------------------------------
+ *
+ * for CONFIG_I2C_X defined (16-bit EEPROM address) offset is
+ * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
+ *
+ * for CONFIG_I2C_X not defined (8-bit EEPROM page address) offset is
+ * 0x00000nxx for EEPROM address selectors and page number at n.
+ */
+void eeprom_write (unsigned offset, uchar *buffer, unsigned cnt)
+{
+ unsigned i, blk_off, blk_num;
+
+ i = 0;
+ while (i < cnt) {
+#ifndef CONFIG_I2C_X
+ blk_num = (offset + i) >> 8;
+ blk_off = (offset + i) & 0xFF;
+
+ write_addr (CFG_EEPROM_ADDR, blk_num);
+ write_byte (blk_off);
+#else
+ blk_num = (offset + i) >> 16; /* addr selectors */
+ blk_off = (offset + i) & 0xFFFF;/* 16-bit address in EEPROM */
+
+ write_addr (CFG_EEPROM_ADDR, blk_num);
+ write_byte (blk_off >> 8); /* upper address octet */
+ write_byte (blk_off & 0xff); /* lower address octet */
+#endif /* CONFIG_I2C_X */
+
+#if defined(CFG_EEPROM_PAGE_WRITE_BITS)
+#define PAGE_OFFSET(x) ((x) & ((1 << CFG_EEPROM_PAGE_WRITE_BITS) - 1))
+ /* Write data until done or would cross a write page boundary.
+ * We must write the address again when changing pages
+ * because the address counter only increments within a page.
+ */
+ do {
+ write_byte (*buffer++);
+ ++i;
+ } while (i < cnt && PAGE_OFFSET(offset + i) != 0);
+#else
+ write_byte (*buffer++);
+ ++i;
+#endif
+ send_stop ();
+ }
+}
+
+/*-----------------------------------------------------------------------
+ * Test: Enable Ethernet
+ */
+#define CFG_PICIO_ADDR 0x57
+uchar pic_read (uchar reg)
+{
+ uchar c;
+
+ eeprom_init ();
+
+ write_addr (CFG_PICIO_ADDR, 0);
+ write_byte (reg);
+ send_start ();
+ read_addr (CFG_PICIO_ADDR, 0);
+ c = read_byte(1);
+ send_stop ();
+ return (c);
+}
+void pic_write (uchar reg, uchar val)
+{
+ write_addr (CFG_PICIO_ADDR, 0);
+ write_byte (reg);
+ write_byte (val);
+ send_stop ();
+}
+
+/*-----------------------------------------------------------------------
+ */
/* ------------------------------------------------------------------------- */
-void reset_phy(void)
+void board_postclk_init(void)
{
- immap_t *immr = (immap_t *)CFG_IMMR;
+#ifdef CFG_I2C_CLOCK
+ //i2c_init (CFG_I2C_CLOCK, 0xFE);
+#else
+ //i2c_init (10000, 0xFE); /* play it slow but safe */
+#endif
+}
+
+/* ------------------------------------------------------------------------- */
- printf ("### ADD CODE HERE to switch on Ethernet for SCC2 ###\n");
+void reset_phy(void)
+{
+ uchar c;
+
+ printf ("### Switch on Ethernet for SCC2 ###\n");
+ c = pic_read (0x61);
+printf ("Old PIC read: reg_61 = 0x%02x\n", c);
+ c |= 0x40; /* disable COM3 */
+ c &= ~0x80; /* enable Ethernet */
+ pic_write (0x61, c);
+c = pic_read (0x61);
+printf ("New PIC read: reg_61 = 0x%02x\n", c);
udelay(1000);
}
i2c_state_t i2c_state;
unsigned char buffer[8];
int rc;
-# define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
+#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
i2c_newio(&i2c_state);
/* schedule send command with start condition */
rc = i2c_send(&i2c_state,
- RS5C372_PPC_I2C_ADR, /* address */
- 0x00, /* secondary address */
- I2CF_ENABLE_SECONDARY | I2CF_START_COND,
- 0, /* size */
- NULL); /* data */
+ RS5C372_PPC_I2C_ADR, /* address */
+ 0x00, /* secondary address */
+ I2CF_ENABLE_SECONDARY | I2CF_START_COND,
+ 0, /* size */
+ NULL); /* data */
if (rc)
goto i2c_error;
/* schedule the read command with repeated start condition */
rc = i2c_receive(&i2c_state,
- RS5C372_PPC_I2C_ADR, /* address */
- 0, /* secondary address */
- I2CF_START_COND | I2CF_STOP_COND,
- sizeof(buffer), /* size to expect */
- buffer); /* data */
+ RS5C372_PPC_I2C_ADR, /* address */
+ 0, /* secondary address */
+ I2CF_START_COND | I2CF_STOP_COND,
+ sizeof(buffer), /* size to expect */
+ buffer); /* data */
if (rc)
goto i2c_error;
/* schedule send operation */
rc = i2c_send(&i2c_state,
- address, /* address */
- 0x00, /* secondary address */
- I2CF_ENABLE_SECONDARY | I2CF_START_COND | I2CF_STOP_COND,
- 0, /* size */
- NULL); /* data */
+ address, /* address */
+ 0x00, /* secondary address */
+ I2CF_ENABLE_SECONDARY | I2CF_START_COND | I2CF_STOP_COND,
+ 0, /* size */
+ NULL); /* data */
if (rc)
goto i2c_error;
/* schedule send operation */
rc = i2c_receive(&i2c_state,
- address, /* address */
- 0, /* secondary address */
- I2CF_START_COND | I2CF_STOP_COND,
- 1, /* size to expect */
- buffer); /* data */
+ address, /* address */
+ 0, /* secondary address */
+ I2CF_START_COND | I2CF_STOP_COND,
+ 1, /* size to expect */
+ buffer); /* data */
if (rc)
goto i2c_error;
i2c_init(100000 >> 1, PPC8260_I2C_ADR);
read_RS5C372_time(&timedate);
- printf(" Time: %02d:%02d:%02d\n", timedate.tm_hour, timedate.tm_min, timedate.tm_sec);
- printf(" Date: %02d-%02d-%04d\n", timedate.tm_mday, timedate.tm_mon, timedate.tm_year);
+ printf(" Time: %02d:%02d:%02d\n",
+ timedate.tm_hour, timedate.tm_min, timedate.tm_sec);
+ printf(" Date: %02d-%02d-%04d\n",
+ timedate.tm_mday, timedate.tm_mon, timedate.tm_year);
ppctemp = read_LM84_temp(LM84_PPC_I2C_ADR);
prottemp = read_LM84_temp(LM84_SHARC_I2C_ADR);
printf(" Temp: PPC %d C, Protocol Board %d C\n",
/*
* Perform Power-Up Initialisation of SDRAM (see 8260 UM, 10.4.2)
*
- * The appropriate BRx/ORx registers have already been set when we get
- * here (see cpu_init_f). The SDRAM can be accessed at the address
- * CFG_SDRAM_BASE.
+ * The appropriate BRx/ORx registers have already
+ * been set when we get here (see cpu_init_f). The
+ * SDRAM can be accessed at the address CFG_SDRAM_BASE.
*/
memctl->memc_mptpr = 0x2000;
memctl->memc_mar = 0x0200;
#ifdef INIT_LOCAL_BUS_SDRAM
/* initialise local bus ram
*
- * (using the PSRMR_ definitions is NOT an error here - the LSDMR has
- * the same fields as the PSDMR!)
+ * (using the PSRMR_ definitions is NOT an error here
+ * - the LSDMR has the same fields as the PSDMR!)
*/
memctl->memc_lsrt = 0x0b;
memctl->memc_lurt = 0x00;
#if defined(CONFIG_HYMOD)
/*
- * this initialisation is for very early stuff that requires the i2c
+ * This initialisation is for very early stuff that requires the i2c
* driver (which needs to know the clocks, to calculate the dividers,
- * and timebase, for udelay(), and dual port ram on the 8xx platform)
+ * and timebase, for udelay(), and Dual Port RAM on the 8xx platform)
*/
board_postclk_init();
#endif
printf (" New Stack Pointer is: %08lx\n", addr_sp);
#endif
+#if defined(CONFIG_LWMON) /* XXX move to same place as for HYMOD XXX */
+ board_postclk_init(); /* XXX once debugging is no longer needed XXX */
+#endif
relocate_code (addr_sp, bd, addr_moni);
/* NOTREACHED - relocate_code() does not return */
pcmcia_init();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE)
-# ifdef CONFIG_IDE_PCCARD
- puts (" PCMCIA:");
-# else
- puts (" IDE: ");
-# endif
- ide_init(bd);
-#endif /* CFG_CMD_IDE */
-
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
puts (" KGDB: ");
kgdb_init();
pci_init();
#endif
+#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+# ifdef CONFIG_IDE_PCCARD
+ puts (" PCMCIA:");
+# else
+ puts (" IDE: ");
+#endif
+ ide_init(bd);
+#endif /* CFG_CMD_IDE */
+
/** LEAVE THIS HERE **/
/* Initialize devices */
devices_init();
printf ("done\n");
return;
+
} else {
printf ("Usage:\n%s\n", cmdtp->usage);
}
return;
+
+#ifdef CONFIG_LWMON
+ case 3:
+ if (strcmp(argv[1],"prd") != 0) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return;
+ }
+ /* fall through */
+ case 4:
+ if (strcmp(argv[1],"prd") == 0) {
+ uchar reg = simple_strtoul(argv[2], NULL, 16);
+ uchar cnt = (argc == 4) ? simple_strtoul(argv[3], NULL, 16) : 1;
+
+ printf ("\nPIC read: reg %02x cnt %d:", reg, cnt);
+ while (cnt) {
+ printf (" %02x", pic_read (reg));
+ ++reg;
+ --cnt;
+ }
+
+ printf (" - done\n");
+ return;
+ } else if (strcmp(argv[1],"pwr") == 0) {
+ uchar reg = simple_strtoul(argv[2], NULL, 16);
+ uchar val = simple_strtoul(argv[3], NULL, 16);
+
+ printf ("\nPIC write: reg %02x val 0x%02x: %02x => ",
+ reg, val, pic_read (reg));
+ pic_write (reg, val);
+ printf ("%02x - done\n", pic_read (reg));
+
+ return;
+ } else {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ }
+#endif
}
}
++ok;
if (dev)
putc ('\n');
- print_part_mac (dev);
+ print_part (dev);
}
}
if (!ok)
int dev = (int)simple_strtoul(argv[2], NULL, 10);
if (ide_device[dev].size) {
- print_part_mac (dev);
+ print_part (dev);
} else {
printf ("\nIDE device %d not available\n", dev);
}
ide_led (led, 0); /* LED off */
ide_print (i);
+ init_part (i); /* initialize partition type */
+
/* make first available device current */
if ((ide_device[i].size > 0) && (curr_device < 0)) {
curr_device = i;
LIB = libdisk.a
-OBJS = part_mac.o
+OBJS = part.o part_mac.o part_dos.o
all: $(LIB)
--- /dev/null
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <ppcboot.h>
+#include <command.h>
+#include <ide.h>
+#include <cmd_disk.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+
+#if defined(CONFIG_MAC_PARTITION) || defined(CONFIG_DOS_PARTITION)
+
+#define PART_TYPE_UNKNOWN 0x00
+#define PART_TYPE_MAC 0x01
+#define PART_TYPE_DOS 0x02
+
+static char part_type [CFG_IDE_MAXDEVICE] = { PART_TYPE_UNKNOWN, };
+
+void init_part (int dev)
+{
+#ifdef CONFIG_MAC_PARTITION
+ if (test_part_mac(dev) == 0) {
+ part_type [dev] = PART_TYPE_MAC;
+ return;
+ }
+#endif
+
+#ifdef CONFIG_DOS_PARTITION
+ if (test_part_dos(dev) == 0) {
+ part_type [dev] = PART_TYPE_DOS;
+ return;
+ }
+#endif
+}
+
+int get_partition_info (int dev, int part, disk_partition_t *info)
+{
+ switch (part_type[dev]) {
+#ifdef CONFIG_MAC_PARTITION
+ case PART_TYPE_MAC:
+ if (get_partition_info_mac(dev,part,info) == 0) {
+printf ("## Valid MAC partition found ##\n");
+ return (0);
+ }
+ break;
+#endif
+
+#ifdef CONFIG_DOS_PARTITION
+ case PART_TYPE_DOS:
+ if (get_partition_info_dos(dev,part,info) == 0) {
+printf ("## Valid DOS partition found ##\n");
+ return (0);
+ }
+ break;
+#endif
+ default:
+ break;
+ }
+ return (-1);
+}
+
+static void print_part_header (const char *type, int dev)
+{
+ printf ("\nPartition Map for IDE device %d -- Partition Type: %s\n\n",
+ dev, type);
+}
+
+void print_part (int dev)
+{
+ switch (part_type[dev]) {
+#ifdef CONFIG_MAC_PARTITION
+ case PART_TYPE_MAC:
+printf ("## Testing for valid MAC partition ##\n");
+ print_part_header ("MAC", dev);
+ print_part_mac (dev);
+ return;
+#endif
+#ifdef CONFIG_DOS_PARTITION
+ case PART_TYPE_DOS:
+printf ("## Testing for valid DOS partition ##\n");
+ print_part_header ("DOS", dev);
+ print_part_dos (dev);
+ return;
+#endif
+ }
+ printf ("## Unknown partition table\n");
+}
+
+#else /* neither MAC nor DOS partition configured */
+# error neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION configured!
+#endif
+
+#endif /* (CONFIG_COMMANDS & CFG_CMD_IDE) */
--- /dev/null
+/*
+ * (C) Copyright 2001
+ * Raymond Lo, lo@routefree.com
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Support for harddisk partitions.
+ *
+ * To be compatible with LinuxPPC and Apple we use the standard Apple
+ * SCSI disk partitioning scheme. For more information see:
+ * http://developer.apple.com/techpubs/mac/Devices/Devices-126.html#MARKER-14-92
+ */
+
+#include <ppcboot.h>
+#include <command.h>
+#include <ide.h>
+#include <cmd_disk.h>
+#include "part_dos.h"
+
+#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_DOS_PARTITION)
+
+/* Convert char[4] in little endian format to the host format integer
+ */
+static inline int le32_to_int(unsigned char *le32)
+{
+ return ((le32[3] << 24) +
+ (le32[2] << 16) +
+ (le32[1] << 8) +
+ le32[0]
+ );
+}
+
+static inline int is_extended(int part_type)
+{
+ return (part_type == 0x5 ||
+ part_type == 0xf ||
+ part_type == 0x85);
+}
+
+static void print_one_part (dos_partition_t *p, int ext_part_sector, int part_num)
+{
+ int lba_start = ext_part_sector + le32_to_int (p->start4);
+ int lba_size = le32_to_int (p->size4);
+
+ printf ("%5d\t\t%10d\t%10d\t%2x%s\n",
+ part_num, lba_start, lba_size, p->sys_ind,
+ (is_extended (p->sys_ind) ? " Extd" : ""));
+}
+
+int test_part_dos (int dev)
+{
+ unsigned char buffer[DEFAULT_SECTOR_SIZE];
+
+ if ((ide_read (dev, 0, 1, (ulong *) buffer) != 1) ||
+ (buffer[DOS_PART_MAGIC_OFFSET + 0] != 0x55) ||
+ (buffer[DOS_PART_MAGIC_OFFSET + 1] != 0xaa) ) {
+ return (-1);
+ }
+ return (0);
+}
+
+
+/* Print a partition that is relative to its Extended partition table
+ */
+static void print_partition_extended (int dev, int ext_part_sector, int relative,
+ int part_num)
+{
+ unsigned char buffer[DEFAULT_SECTOR_SIZE];
+ dos_partition_t *pt;
+ int i;
+
+ if (ide_read (dev, ext_part_sector, 1, (ulong *) buffer) != 1) {
+ printf ("** Can't read partition table on %d:%d **\n",
+ dev, ext_part_sector);
+ return;
+ }
+ if (buffer[DOS_PART_MAGIC_OFFSET] != 0x55 ||
+ buffer[DOS_PART_MAGIC_OFFSET + 1] != 0xaa) {
+ printf ("bad MBR sector signature 0x%02x%02x\n",
+ buffer[DOS_PART_MAGIC_OFFSET],
+ buffer[DOS_PART_MAGIC_OFFSET + 1]);
+ return;
+ }
+
+ /* Print all primary/logical partitions */
+ pt = (dos_partition_t *) (buffer + DOS_PART_TBL_OFFSET);
+ for (i = 0; i < 4; i++, pt++) {
+ /*
+ * fdisk does not show the extended partitions that
+ * are not in the MBR
+ */
+
+ if ((pt->sys_ind != 0) &&
+ (ext_part_sector == 0 || !is_extended (pt->sys_ind)) ) {
+ print_one_part (pt, ext_part_sector, part_num);
+ }
+
+ /* Reverse engr the fdisk part# assignment rule! */
+ if ((ext_part_sector == 0) ||
+ (pt->sys_ind != 0 && !is_extended (pt->sys_ind)) ) {
+ part_num++;
+ }
+ }
+
+ /* Follows the extended partitions */
+ pt = (dos_partition_t *) (buffer + DOS_PART_TBL_OFFSET);
+ for (i = 0; i < 4; i++, pt++) {
+ if (is_extended (pt->sys_ind)) {
+ int lba_start = le32_to_int (pt->start4) + relative;
+
+ print_partition_extended (dev, lba_start,
+ ext_part_sector == 0 ? lba_start
+ : relative,
+ part_num);
+ }
+ }
+
+ return;
+}
+
+
+/* Print a partition that is relative to its Extended partition table
+ */
+static int get_partition_info_extended (int dev, int ext_part_sector,
+ int relative, int part_num,
+ int which_part, disk_partition_t *info)
+{
+ unsigned char buffer[DEFAULT_SECTOR_SIZE];
+ dos_partition_t *pt;
+ int i;
+
+ if (ide_read (dev, ext_part_sector, 1, (ulong *) buffer) != 1) {
+ printf ("** Can't read partition table on %d:%d **\n",
+ dev, ext_part_sector);
+ return -1;
+ }
+ if (buffer[DOS_PART_MAGIC_OFFSET] != 0x55 ||
+ buffer[DOS_PART_MAGIC_OFFSET + 1] != 0xaa) {
+ printf ("bad MBR sector signature 0x%02x%02x\n",
+ buffer[DOS_PART_MAGIC_OFFSET],
+ buffer[DOS_PART_MAGIC_OFFSET + 1]);
+ return -1;
+ }
+
+ /* Print all primary/logical partitions */
+ pt = (dos_partition_t *) (buffer + DOS_PART_TBL_OFFSET);
+ for (i = 0; i < 4; i++, pt++) {
+ /*
+ * fdisk does not show the extended partitions that
+ * are not in the MBR
+ */
+ if (pt->sys_ind != 0 && part_num == which_part) {
+ info->blksz = 512;
+ info->start = ext_part_sector + le32_to_int (pt->start4);
+ info->size = le32_to_int (pt->size4);
+ sprintf (info->name, "hd%c%d\n", 'a' + dev, part_num);
+ // sprintf(info->type, "%d, pt->sys_ind);
+ sprintf (info->type, "PPCBoot");
+ return 0;
+ }
+
+ /* Reverse engr the fdisk part# assignment rule! */
+ if ((ext_part_sector == 0) ||
+ (pt->sys_ind != 0 && !is_extended (pt->sys_ind)) ) {
+ part_num++;
+ }
+ }
+
+ /* Follows the extended partitions */
+ pt = (dos_partition_t *) (buffer + DOS_PART_TBL_OFFSET);
+ for (i = 0; i < 4; i++, pt++) {
+ if (is_extended (pt->sys_ind)) {
+ int lba_start = le32_to_int (pt->start4) + relative;
+
+ return get_partition_info_extended (dev, lba_start,
+ ext_part_sector == 0 ? lba_start : relative,
+ part_num, which_part, info);
+ }
+ }
+ return -1;
+}
+
+void print_part_dos (int dev)
+{
+ printf ("Partition Start Sector Num Sectors Type\n");
+ print_partition_extended (dev, 0, 0, 1);
+}
+
+int get_partition_info_dos (int dev, int part, disk_partition_t * info)
+{
+ return get_partition_info_extended (dev, 0, 0, 1, part, info);
+}
+
+#endif /* (CONFIG_COMMANDS & CFG_CMD_IDE) && CONFIG_DOS_PARTITION */
--- /dev/null
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _DISK_PART_DOS_H
+#define _DISK_PART_DOS_H
+
+
+#define DEFAULT_SECTOR_SIZE 512
+#define DOS_PART_TBL_OFFSET 0x1be
+#define DOS_PART_MAGIC_OFFSET 0x1fe
+
+typedef struct dos_partition {
+ unsigned char boot_ind; /* 0x80 - active */
+ unsigned char head; /* starting head */
+ unsigned char sector; /* starting sector */
+ unsigned char cyl; /* starting cylinder */
+ unsigned char sys_ind; /* What partition type */
+ unsigned char end_head; /* end head */
+ unsigned char end_sector; /* end sector */
+ unsigned char end_cyl; /* end cylinder */
+ unsigned char start4[4]; /* starting sector counting from 0 */
+ unsigned char size4[4]; /* nr of sectors in partition */
+} dos_partition_t;
+
+#endif /* _DISK_PART_DOS_H */
#include <cmd_disk.h>
#include "part_mac.h"
+#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_MAC_PARTITION)
+
/* stdlib.h causes some compatibility problems; should fixe these! -- wd */
#ifndef __ldiv_t_defined
typedef struct {
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE)
-
static int part_mac_read_ddb (int dev, mac_driver_desc_t *ddb_p);
static int part_mac_read_pdb (int dev, int part, mac_partition_t *pdb_p);
+/*
+ * Test for a valid MAC partition
+ */
+int test_part_mac (int dev)
+{
+ mac_driver_desc_t ddesc;
+ mac_partition_t mpart;
+ ulong i, n;
+
+ if (part_mac_read_ddb (dev, &ddesc)) {
+ /* error reading Driver Desriptor Block, or no valid Signature */
+ return (-1);
+ }
+
+ n = 1; /* assuming at least one partition */
+ for (i=1; i<=n; ++i) {
+ if ((ide_read (dev, i, 1, (ulong *)&mpart) != 1) ||
+ (mpart.signature != MAC_PARTITION_MAGIC) ) {
+ return (-1);
+ }
+ /* update partition count */
+ n = mpart.map_count;
+ }
+ return (0);
+}
+
void print_part_mac (int dev)
{
mac_partition_t mpart;
ldiv_t mb, gb;
- printf ("\nPartition Map for IDE device %d:\n", dev);
-
if (part_mac_read_ddb (dev, &ddesc)) {
/* error reading Driver Desriptor Block, or no valid Signature */
return;
bytes, c
);
}
+
+ return;
}
}
if (ddb_p->signature != MAC_DRIVER_MAGIC) {
+#if 0
printf ("** Bad Signature: expected 0x%04x, got 0x%04x\n",
MAC_DRIVER_MAGIC, ddb_p->signature);
+#endif
return (-1);
}
return (0);
/* NOTREACHED */
}
-/*
- * The following code could / should be moved to a more general layer
- * (common/disk.c ?) when we have to support more than one partition
- * type one day.
- */
-int get_partition_info (int dev, int part, disk_partition_t *info)
+int get_partition_info_mac (int dev, int part, disk_partition_t *info)
{
mac_driver_desc_t ddesc;
mac_partition_t mpart;
return (0);
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_IDE */
+#endif /* (CONFIG_COMMANDS & CFG_CMD_IDE) && CONFIG_MAC_PARTITION */
uchar type[32]; /* string type description */
} disk_partition_t;
-int get_partition_info (int dev, int part, disk_partition_t *info);
+int get_partition_info (int dev, int part, disk_partition_t *info);
+#ifdef CONFIG_MAC_PARTITION
+int get_partition_info_mac (int dev, int part, disk_partition_t *info);
+#endif
+#ifdef CONFIG_DOS_PARTITION
+int get_partition_info_dos (int dev, int part, disk_partition_t *info);
+#endif
#endif /* _CMD_DISK_H */
#define SCC_ENET 1
#define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */
#define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */
-#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */
+#define PA_ENET_RCLK ((ushort)0x0800) /* PA 4 */
#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */
#define PB_ENET_TENA ((uint)0x00002000) /* PB 18 */
#define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */
#define PC_ENET_RENA ((ushort)0x0080) /* PC 8 */
-/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to
+/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK4) to
* SCC2. Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero.
*/
#define SICR_ENET_MASK ((uint)0x0000ff00)
-#define SICR_ENET_CLKRT ((uint)0x00002600)
+#define SICR_ENET_CLKRT ((uint)0x00003E00)
#endif /* CONFIG_LWMON */
/*** SXNI855T ******************************************************/
#define CFG_ENV_OFFSET 0 /* Start right at beginning of NVRAM */
#define CFG_ENV_SIZE 1024 /* Use only a part of it - it's slow! */
+/*-----------------------------------------------------------------------
+ * EEPROM Configuration
+ */
+#define CFG_EEPROM_ADDR 0xA0
+
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#undef CONFIG_STATUS_LED /* Status LED disabled */
-#define CONFIG_I2C /* I2C support enabled */
+// #define CONFIG_I2C /* I2C support enabled */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_I2C /*|CFG_CMD_IDE*/)
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_EEPROM /*| CFG_CMD_I2C|CFG_CMD_IDE*/)
#define CONFIG_BOOTP_MASK \
((CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) & ~CONFIG_BOOTP_GATEWAY)
#define CFG_ENV_ADDR 0x407E0000 /* Address of Environment Sector */
#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment */
#define CFG_ENV_SECT_SIZE 0x20000 /* we have BIG sectors only :-( */
+/*-----------------------------------------------------------------------
+ * I2C/EEPROM Configuration
+ */
+#define CFG_I2C_CLOCK 33000 /* I²C Clock Rate in kHz */
+
+#define CFG_EEPROM_ADDR 0x58
+
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define MCR_UPM_A 0x00000000 /* Select UPM A */
#define MCR_UPM_B 0x00800000 /* Select UPM B */
#define MCR_MB_CS0 0x00000000 /* Use Chip Select /CS0 */
-#define MCR_MB_CS1 0x00020000 /* Use Chip Select /CS1 */
-#define MCR_MB_CS2 0x00040000 /* Use Chip Select /CS2 */
-#define MCR_MB_CS3 0x00060000 /* Use Chip Select /CS3 */
-#define MCR_MB_CS4 0x00080000 /* Use Chip Select /CS4 */
-#define MCR_MB_CS5 0x000A0000 /* Use Chip Select /CS5 */
-#define MCR_MB_CS6 0x000C0000 /* Use Chip Select /CS6 */
-#define MCR_MB_CS7 0x000E0000 /* Use Chip Select /CS7 */
+#define MCR_MB_CS1 0x00002000 /* Use Chip Select /CS1 */
+#define MCR_MB_CS2 0x00004000 /* Use Chip Select /CS2 */
+#define MCR_MB_CS3 0x00006000 /* Use Chip Select /CS3 */
+#define MCR_MB_CS4 0x00008000 /* Use Chip Select /CS4 */
+#define MCR_MB_CS5 0x0000A000 /* Use Chip Select /CS5 */
+#define MCR_MB_CS6 0x0000C000 /* Use Chip Select /CS6 */
+#define MCR_MB_CS7 0x0000E000 /* Use Chip Select /CS7 */
#define MCR_MLCF(n) (((n)&0xF)<<8) /* Memory Command Loop Count Field */
#define MCR_MAD(addr) ((addr)&0x3F) /* Memory Array Index */
#define TMR_GE 0x0001 /* Gate Enable */
+/*-----------------------------------------------------------------------
+ * I2C Controller Registers
+ */
+#define I2MOD_REVD 0x20 /* Reverese Data */
+#define I2MOD_GCD 0x10 /* General Call Disable */
+#define I2MOD_FLT 0x08 /* Clock Filter */
+#define I2MOD_PDIV32 0x00 /* Pre-Divider 32 */
+#define I2MOD_PDIV16 0x02 /* Pre-Divider 16 */
+#define I2MOD_PDIV8 0x04 /* Pre-Divider 8 */
+#define I2MOD_PDIV4 0x06 /* Pre-Divider 4 */
+#define I2MOD_EN 0x01 /* Enable */
+
+#define I2CER_TXE 0x10 /* Tx Error */
+#define I2CER_BSY 0x04 /* Busy Condition */
+#define I2CER_TXB 0x02 /* Tx Buffer Transmitted */
+#define I2CER_RXB 0x01 /* Rx Buffer Received */
+#define I2CER_ALL (I2CER_TXE | I2CER_BSY | I2CER_TXB | I2CER_RXB)
+
+#define I2COM_STR 0x80 /* Start Transmit */
+#define I2COM_MASTER 0x01 /* Master mode */
+
/*-----------------------------------------------------------------------
* PCMCIA Interface General Control Register 17-12
*/
#if defined(CONFIG_SPD823TS) || \
defined(CONFIG_IVMS8) || \
defined(CONFIG_IVML24) || \
- defined(CONFIG_IP860)
+ defined(CONFIG_IP860) || \
+ defined(CONFIG_LWMON)
/* $(BOARD)/$(BOARD).c */
void reset_phy (void);
#endif
defined(CONFIG_CPCI405) || \
defined(CONFIG_CANBT) || \
defined(CONFIG_WALNUT405) || \
- defined (CONFIG_CPCIISER4)
+ defined(CONFIG_CPCIISER4) || \
+ defined(CONFIG_LWMON)
/* $(BOARD)/eeprom.c */
void eeprom_init (void);
void eeprom_read (unsigned offset, uchar *buffer, unsigned cnt);
void eeprom_write (unsigned offset, uchar *buffer, unsigned cnt);
+# ifdef CONFIG_LWMON
+extern uchar pic_read (uchar reg);
+extern void pic_write (uchar reg, uchar val);
+# endif
#endif
#ifdef CONFIG_MBX
/* $(BOARD)/$(BOARD).c */
int board_pre_init (void);
#endif
-#if defined(CONFIG_HYMOD)
+#if defined(CONFIG_HYMOD) || defined(CONFIG_LWMON)
void board_postclk_init(void); /* after clocks/timebase, before env/serial */
#endif
/* ppc/crc32.c */
ulong crc32 (ulong, const unsigned char *, uint);
+#ifdef CONFIG_MAC_PARTITION
/* disk/part_mac.c */
void print_part_mac (int);
+int test_part_mac (int);
+#endif
+#ifdef CONFIG_DOS_PARTITION
+/* disk/part_dos.c */
+void print_part_dos (int);
+int test_part_dos (int);
+#endif
+/* disk/part.c */
+void print_part (int);
+void init_part (int);
/* common/console.c */
bd_t *bd_ptr ;
#ifndef __VERSION_H__
#define __VERSION_H__
-#define PPCBOOT_VERSION "ppcboot 0.9.0-pre2"
+#define PPCBOOT_VERSION "ppcboot 0.9.0-pre3"
#endif /* __VERSION_H__ */
projects / users / rw / ppcboot.git / commitdiff