k_tmp->bits_per_word = u_tmp->bits_per_word;
                k_tmp->delay_usecs = u_tmp->delay_usecs;
                k_tmp->speed_hz = u_tmp->speed_hz;
+               k_tmp->word_delay_usecs = u_tmp->word_delay_usecs;
                if (!k_tmp->speed_hz)
                        k_tmp->speed_hz = spidev->speed_hz;
 #ifdef VERBOSE
                dev_dbg(&spidev->spi->dev,
-                       "  xfer len %u %s%s%s%dbits %u usec %uHz\n",
+                       "  xfer len %u %s%s%s%dbits %u usec %u usec %uHz\n",
                        u_tmp->len,
                        u_tmp->rx_buf ? "rx " : "",
                        u_tmp->tx_buf ? "tx " : "",
                        u_tmp->cs_change ? "cs " : "",
                        u_tmp->bits_per_word ? : spidev->spi->bits_per_word,
                        u_tmp->delay_usecs,
+                       u_tmp->word_delay_usecs,
                        u_tmp->speed_hz ? : spidev->spi->max_speed_hz);
 #endif
                spi_message_add_tail(k_tmp, &msg);
 
  * @delay_usecs: If nonzero, how long to delay after the last bit transfer
  *     before optionally deselecting the device before the next transfer.
  * @cs_change: True to deselect device before starting the next transfer.
+ * @word_delay_usecs: If nonzero, how long to wait between words within one
+ *     transfer. This property needs explicit support in the SPI controller,
+ *     otherwise it is silently ignored.
  *
  * This structure is mapped directly to the kernel spi_transfer structure;
  * the fields have the same meanings, except of course that the pointers
        __u8            cs_change;
        __u8            tx_nbits;
        __u8            rx_nbits;
-       __u16           pad;
+       __u8            word_delay_usecs;
+       __u8            pad;
 
        /* If the contents of 'struct spi_ioc_transfer' ever change
         * incompatibly, then the ioctl number (currently 0) must change;