* Add configuration for 9-column SDRAM on PM826 board

* Fix "reset" command on Sandpoint8240 board
* Fix "bootelf" command (turn off cache AFTER the last printf()).

diff --git a/CHANGELOG b/CHANGELOG
index 99c71cd5f3d02ff46083ee5fb5f0a3d35fd37ad9..c1de5f10674c71bb345945734fac9fb41011dc02 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,10 @@
 Modifications for 1.1.5:
 ======================================================================
 
+* Add configuration for 9-column SDRAM on PM826 board
+
+* Fix "reset" command on Sandpoint8240 board
+
 * Patch by Josh Huber, 22 Jan 2002
   Fixes for EVB64260 board:
   - Fixes to the built-in ethernet driver
@@ -49,6 +53,7 @@ Modifications for 1.1.5:
 * Add DOC boot command and (raw) partition info support
 
 * Disable data cache when booting (ELF / QNX) images
+  (Make sure NOT to use printf() etc. after that!)
 
 * Enable interrupts before starting IH_TYPE_STANDALONE images
 

diff --git a/board/pm826/pm826.c b/board/pm826/pm826.c
index 8f65f565088a3a63290c2b05355545e084cc0270..741ba85f9b765baa04718307d6a11c8004c9ec0c 100644 (file)
--- a/board/pm826/pm826.c
+++ b/board/pm826/pm826.c
@@ -191,26 +191,38 @@ int checkboard(void)
 
 /* ------------------------------------------------------------------------- */
 
-#define MAXSIZE (256<<20)
 
-long int initdram(int board_type)
+/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
+ *
+ * This routine performs standard 8260 initialization sequence
+ * and calculates the available memory size. It may be called
+ * several times to try different SDRAM configurations on both
+ * 60x and local buses.
+ */
+static long int try_init(volatile memctl8260_t *memctl, ulong sdmr, ulong orx,
+                 volatile uchar * base)
 {
-    volatile immap_t *         immap  = (immap_t *)CFG_IMMR;
-    volatile memctl8260_t *    memctl = &immap->im_memctl;
-#ifndef CFG_RAMBOOT
-    volatile uint *            psdmr_ptr = &memctl->memc_psdmr;
-    volatile uchar *           base = CFG_SDRAM_BASE;
-    volatile ulong *           addr;
-    volatile char              c = 0xff;
-    ulong                      save[32];
-    ulong                      val;
-    int                                i,cnt;
-#endif
+    volatile uchar     c = 0xff;
+    volatile ulong     cnt, val;
+    volatile ulong *   addr;
+    volatile uint *    sdmr_ptr;
+    volatile uint *    orx_ptr;
+    int                        i;
+    ulong              save[32];       /* to make test non-destructive */
+    ulong              maxsize;
 
-    memctl->memc_psrt = CFG_PSRT;
-    memctl->memc_mptpr = CFG_MPTPR;
+    /* We must be able to test a location outsize the maximum legal size
+     * to find out THAT we are outside; but this address still has to be
+     * mapped by the controller. That means, that the initial mapping has
+     * to be (at least) twice as large as the maximum expected size.
+     */
+    maxsize = (1 + (~orx | 0x7fff)) / 2;
+
+    sdmr_ptr = &memctl->memc_psdmr;
+    orx_ptr  = &memctl->memc_or2;
+
+    *orx_ptr = orx;
 
-#ifndef CFG_RAMBOOT
     /*
      * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
      *
@@ -231,17 +243,17 @@ long int initdram(int board_type)
      * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
      */
 
-    *psdmr_ptr = CFG_PSDMR | PSDMR_OP_PREA;
+    *sdmr_ptr = sdmr | PSDMR_OP_PREA;
     *base = c;
 
-    *psdmr_ptr = CFG_PSDMR | PSDMR_OP_CBRR;
+    *sdmr_ptr = sdmr | PSDMR_OP_CBRR;
     for (i = 0; i < 8; i++)
        *base = c;
 
-    *psdmr_ptr = CFG_PSDMR | PSDMR_OP_MRW;
+    *sdmr_ptr = sdmr | PSDMR_OP_MRW;
     *(base + CFG_MRS_OFFS) = c;                /* setting MR on address lines */
 
-    *psdmr_ptr = CFG_PSDMR | PSDMR_OP_NORM | PSDMR_RFEN;
+    *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
     *base = c;
 
     /*
@@ -252,7 +264,7 @@ long int initdram(int board_type)
      * - short between data lines
      */
     i = 0;
-    for (cnt = MAXSIZE/sizeof(long); cnt > 0; cnt >>= 1) {
+    for (cnt = maxsize/sizeof(long); cnt > 0; cnt >>= 1) {
        addr = (volatile ulong *)base + cnt;    /* pointer arith! */
        save[i++] = *addr;
        *addr = ~cnt;
@@ -267,20 +279,46 @@ long int initdram(int board_type)
        return (0);
     }
 
-    for (cnt = 1; cnt <= MAXSIZE/sizeof(long); cnt <<= 1) {
+    for (cnt = 1; cnt <= maxsize/sizeof(long); cnt <<= 1) {
         addr = (volatile ulong *)base + cnt;   /* pointer arith! */
        val = *addr;
        *addr = save[--i];
        if (val != ~cnt) {
            /* Write the actual size to ORx
             */
-           memctl->memc_or2 = CFG_OR2_PRELIM | ~(cnt * sizeof(long) - 1);
+           *orx_ptr = orx | ~(cnt * sizeof(long) - 1);
            return (cnt * sizeof(long));
        }
     }
+    return (maxsize);
+}
 
-#else
-    return (32<<20);
+
+long int initdram(int board_type)
+{
+    volatile immap_t *         immap  = (immap_t *)CFG_IMMR;
+    volatile memctl8260_t *    memctl = &immap->im_memctl;
+#ifndef CFG_RAMBOOT
+    ulong                      size8, size9, psize = 32 * 1024 * 1024;
+#endif
+
+    memctl->memc_psrt = CFG_PSRT;
+    memctl->memc_mptpr = CFG_MPTPR;
+
+#ifndef CFG_RAMBOOT
+    size8 = try_init(memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
+               (uchar *) CFG_SDRAM_BASE);
+    size9 = try_init(memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
+               (uchar *) CFG_SDRAM_BASE);
+
+    if (size8 < size9) {
+       psize = size9;
+       printf("(60x:9COL) ");
+    } else {
+       psize = try_init(memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
+               (uchar *) CFG_SDRAM_BASE);
+       printf("(60x:8COL) ");
+    }
 #endif
-    return (MAXSIZE);
+    return (psize);
 }

diff --git a/common/board.c b/common/board.c
index 9da899ff039fbf4644048ce3a3b00813e01c2606..317500234dc28bfc49d8463c5b2ad90f489d0ce7 100644 (file)
--- a/common/board.c
+++ b/common/board.c
@@ -224,6 +224,14 @@ board_init_f (ulong bootflag)
     /* Initialize the console (before the relocation) */
     console_init_f ();
 
+#ifdef DEBUG
+    if(sizeof(init_data_t) > CFG_INIT_DATA_SIZE) {
+       printf ("PANIC: sizeof(init_data_t)=%d > CFG_INIT_DATA_SIZE=%d\n",
+               sizeof(init_data_t), CFG_INIT_DATA_SIZE);
+       hang();
+    }
+#endif /* DEBUG */
+
     /* now we can use standard printf/puts/getc/tstc functions */
     display_options();
 

diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index 9c911791ad9f3ab1fd6b87b18646fd268d9755e6..850818987c04b18a296a3b15b30618105bb1d07d 100644 (file)
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -50,6 +50,8 @@ int do_bootelf (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 
        addr = load_elf_image (addr);
 
+       printf ("## Starting application at 0x%08lx ...\n", addr);
+
        /*
         * QNX images require the data cache is disabled.
         * Data cache is already flushed, so just turn it off.
@@ -57,8 +59,6 @@ int do_bootelf (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
        if (dcache_status ())
                dcache_disable ();
 
-       printf ("## Starting application at 0x%08lx ...\n", addr);
-
        /*
         * pass address parameter as argv[0] (aka command name),
         * and all remaining args

diff --git a/include/config_PM826.h b/include/config_PM826.h
index 6c68595fa52071e45e7783713a0584a2a5dc842d..26310bdc91ea908c6546f7473e85e531eb6ffae3 100644 (file)
--- a/include/config_PM826.h
+++ b/include/config_PM826.h
@@ -396,12 +396,12 @@
 
        /* SDRAM initialization values for 8-column chips
         */
-#define CFG_OR2_PRELIM  (CFG_MIN_AM_MASK               |\
+#define CFG_OR2_8COL    (CFG_MIN_AM_MASK               |\
                          ORxS_BPD_4                     |\
                          ORxS_ROWST_PBI0_A9             |\
                          ORxS_NUMR_12)
 
-#define CFG_PSDMR       (PSDMR_SDAM_A13_IS_A5           |\
+#define CFG_PSDMR_8COL  (PSDMR_SDAM_A13_IS_A5           |\
                          PSDMR_BSMA_A14_A16             |\
                          PSDMR_SDA10_PBI0_A10           |\
                          PSDMR_RFRC_7_CLK               |\
@@ -411,6 +411,26 @@
                          PSDMR_WRC_1C                   |\
                          PSDMR_CL_2)
 
+       /* SDRAM initialization values for 9-column chips
+        */ 
+#define CFG_OR2_9COL    (CFG_MIN_AM_MASK                |\
+                         ORxS_BPD_4                     |\
+                         ORxS_ROWST_PBI1_A4             |\
+                         ORxS_NUMR_13)
+
+#define CFG_PSDMR_9COL  (PSDMR_SDAM_A14_IS_A5           |\
+                         PSDMR_BSMA_A13_A15             |\
+                         PSDMR_SDA10_PBI0_A9            |\
+                         PSDMR_RFRC_7_CLK               |\
+                         PSDMR_PRETOACT_2W              |\
+                         PSDMR_ACTTORW_1W               |\
+                         PSDMR_LDOTOPRE_1C              |\
+                         PSDMR_WRC_1C                   |\
+                         PSDMR_CL_2)
+
+#define CFG_OR2_PRELIM   CFG_OR2_9COL
+#define CFG_PSDMR        CFG_PSDMR_9COL
+
 #endif /* CFG_RAMBOOT */
 
 #endif /* __CONFIG_H */

diff --git a/include/config_Sandpoint8240.h b/include/config_Sandpoint8240.h
index 235cb18be90239000ca4339758d7df1e848131df..20d399262bde0d5b32df642354e62f02bfa36ec5 100644 (file)
--- a/include/config_Sandpoint8240.h
+++ b/include/config_Sandpoint8240.h
@@ -84,6 +84,8 @@
 #define CFG_SDRAM_BASE         0x00000000
 #define CFG_MAX_RAM_SIZE       0x10000000
 
+#define CFG_RESET_ADDRESS      0xFFF00100
+
 #if defined (USE_DINK32)
 #define CFG_MONITOR_LEN                0x00030000
 #define CFG_MONITOR_BASE       0x00090000