Use just 1 flash sector for environment on the ETX094 boards.

Fix BR0 reset handling for older CPU mask revisions: Clear everything
except Port Size bits, then add just the "Bank Valid" bit

diff --git a/include/config_ETX094.h b/include/config_ETX094.h
index 2898d0f986af0947135362cb5681aca1b8dcf979..607705b09da45a144ba4a202d6c7d2fbf9913956 100644 (file)
--- a/include/config_ETX094.h
+++ b/include/config_ETX094.h
@@ -63,8 +63,8 @@
 #define        CFG_MAXARGS     8               /* max number of command args   */
 #define CFG_BARGSIZE   CFG_CBSIZE      /* Boot Argument Buffer Size    */
 
-#define CFG_MEMTEST_START      0x0400000       /* memtest works on     */
-#define CFG_MEMTEST_END                0x0C00000       /* 4 ... 12 MB in DRAM  */
+#define CFG_MEMTEST_START      0x0300000       /* memtest works on     */
+#define CFG_MEMTEST_END                0x0700000       /* 3 ... 7 MB in DRAM   */
 
 #define        CFG_TFTP_LOADADDR       0x100000        /* default load address */
 
@@ -108,7 +108,7 @@
 #define CFG_FLASH_WRITE_TOUT   500     /* Timeout for Flash Write (in ms)      */
 
 #define        CFG_FLASH_ENV_OFFSET    0x8000  /*   Offset   of Environment Sector     */
-#define        CFG_FLASH_ENV_SIZE      0x4000  /* Total Size of Environment Sector     */
+#define        CFG_FLASH_ENV_SIZE      0x2000  /* Total Size of Environment Sector     */
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */

diff --git a/mpc8xx/cpu_init.c b/mpc8xx/cpu_init.c
index 860b49641d860dcf52a0e1eb46e621fefd77f8b0..ab9c92e24dd5c3a1fa637619d871e71413cb156a 100644 (file)
--- a/mpc8xx/cpu_init.c
+++ b/mpc8xx/cpu_init.c
@@ -89,7 +89,10 @@ cpu_init_f (volatile immap_t *immr)
      */
 
     /* perform BR0 reset that MPC850 Rev. A can't guarantee */
-    memctl->memc_br0 |= 0x00000001;    /* just "bank valid" bit */
+    reg = memctl->memc_br0;
+    reg &= BR_PS_MSK;          /* Clear everything except Port Size bits */
+    reg |= BR_V;               /* then add just the "Bank Valid" bit     */
+    memctl->memc_br0 = reg;
 
     /* Map banks 0 and 1 to the FLASH banks 0 and 1 at preliminary
      * addresses - these have to be modified later when FLASH size