#include <drm/drm_modes.h>
 #include <drm/drm_panel.h>
 
+struct nv3052c_reg {
+       u8 cmd;
+       u8 val;
+};
+
 struct nv3052c_panel_info {
        const struct drm_display_mode *display_modes;
        unsigned int num_modes;
        u16 width_mm, height_mm;
        u32 bus_format, bus_flags;
+       const struct nv3052c_reg *panel_regs;
+       unsigned int panel_regs_len;
 };
 
 struct nv3052c {
        struct gpio_desc *reset_gpio;
 };
 
-struct nv3052c_reg {
-       u8 cmd;
-       u8 val;
-};
-
-static const struct nv3052c_reg nv3052c_panel_regs[] = {
+static const struct nv3052c_reg ltk035c5444t_panel_regs[] = {
        // EXTC Command set enable, select page 1
        { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x01 },
        // Mostly unknown registers
 static int nv3052c_prepare(struct drm_panel *panel)
 {
        struct nv3052c *priv = to_nv3052c(panel);
+       const struct nv3052c_reg *panel_regs = priv->panel_info->panel_regs;
+       unsigned int panel_regs_len = priv->panel_info->panel_regs_len;
        struct mipi_dbi *dbi = &priv->dbi;
        unsigned int i;
        int err;
        gpiod_set_value_cansleep(priv->reset_gpio, 0);
        usleep_range(5000, 20000);
 
-       for (i = 0; i < ARRAY_SIZE(nv3052c_panel_regs); i++) {
-               err = mipi_dbi_command(dbi, nv3052c_panel_regs[i].cmd,
-                                      nv3052c_panel_regs[i].val);
+       for (i = 0; i < panel_regs_len; i++) {
+               err = mipi_dbi_command(dbi, panel_regs[i].cmd,
+                                      panel_regs[i].val);
 
                if (err) {
                        dev_err(priv->dev, "Unable to set register: %d\n", err);
        .height_mm = 64,
        .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
        .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
+       .panel_regs = ltk035c5444t_panel_regs,
+       .panel_regs_len = ARRAY_SIZE(ltk035c5444t_panel_regs),
 };
 
 static const struct spi_device_id nv3052c_ids[] = {