int cgx_lmac_internal_loopback(void *cgxd, int lmac_id, bool enable)
 {
        struct cgx *cgx = cgxd;
-       u8 lmac_type;
+       struct lmac *lmac;
        u64 cfg;
 
        if (!is_lmac_valid(cgx, lmac_id))
                return -ENODEV;
 
-       lmac_type = cgx->mac_ops->get_lmac_type(cgx, lmac_id);
-       if (lmac_type == LMAC_MODE_SGMII || lmac_type == LMAC_MODE_QSGMII) {
+       lmac = lmac_pdata(lmac_id, cgx);
+       if (lmac->lmac_type == LMAC_MODE_SGMII ||
+           lmac->lmac_type == LMAC_MODE_QSGMII) {
                cfg = cgx_read(cgx, lmac_id, CGXX_GMP_PCS_MRX_CTL);
                if (enable)
                        cfg |= CGXX_GMP_PCS_MRX_CTL_LBK;
        return 0;
 }
 
+int cgx_lmac_reset(void *cgxd, int lmac_id, u8 pf_req_flr)
+{
+       struct cgx *cgx = cgxd;
+       u64 cfg;
+
+       if (!is_lmac_valid(cgx, lmac_id))
+               return -ENODEV;
+
+       /* Resetting PFC related CSRs */
+       cfg = 0xff;
+       cgx_write(cgxd, lmac_id, CGXX_CMRX_RX_LOGL_XON, cfg);
+
+       if (pf_req_flr)
+               cgx_lmac_internal_loopback(cgxd, lmac_id, false);
+       return 0;
+}
+
 static int cgx_configure_interrupt(struct cgx *cgx, struct lmac *lmac,
                                   int cnt, bool req_free)
 {
                cgx->lmac_idmap[lmac->lmac_id] = lmac;
                set_bit(lmac->lmac_id, &cgx->lmac_bmap);
                cgx->mac_ops->mac_pause_frm_config(cgx, lmac->lmac_id, true);
+               lmac->lmac_type = cgx->mac_ops->get_lmac_type(cgx, lmac->lmac_id);
        }
 
        return cgx_lmac_verify_fwi_version(cgx);
        .mac_tx_enable =                cgx_lmac_tx_enable,
        .pfc_config =                   cgx_lmac_pfc_config,
        .mac_get_pfc_frm_cfg   =        cgx_lmac_get_pfc_frm_cfg,
+       .mac_reset   =                  cgx_lmac_reset,
 };
 
 static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 
 #define CGXX_CMRX_INT_ENA_W1S          0x058
 #define CGXX_CMRX_RX_ID_MAP            0x060
 #define CGXX_CMRX_RX_STAT0             0x070
+#define CGXX_CMRX_RX_LOGL_XON          0x100
 #define CGXX_CMRX_RX_LMACS             0x128
 #define CGXX_CMRX_RX_DMAC_CTL0         (0x1F8 + mac_ops->csr_offset)
 #define CGX_DMAC_CTL0_CAM_ENABLE       BIT_ULL(3)
                             u8 *rx_pause);
 int verify_lmac_fc_cfg(void *cgxd, int lmac_id, u8 tx_pause, u8 rx_pause,
                       int pfvf_idx);
+int cgx_lmac_reset(void *cgxd, int lmac_id, u8 pf_req_flr);
 #endif /* CGX_H */
 
  * @cgx:               parent cgx port
  * @mcast_filters_count:  Number of multicast filters installed
  * @lmac_id:           lmac port id
+ * @lmac_type:         lmac type like SGMII/XAUI
  * @cmd_pend:          flag set before new command is started
  *                     flag cleared after command response is received
  * @name:              lmac port name
        struct cgx *cgx;
        u8 mcast_filters_count;
        u8 lmac_id;
+       u8 lmac_type;
        bool cmd_pend;
        char *name;
 };
 
        int                     (*mac_get_pfc_frm_cfg)(void *cgxd, int lmac_id,
                                                       u8 *tx_pause, u8 *rx_pause);
+       int                     (*mac_reset)(void *cgxd, int lmac_id, u8 pf_req_flr);
 
        /* FEC stats */
        int                     (*get_fec_stats)(void *cgxd, int lmac_id,
 
        .mac_tx_enable =                rpm_lmac_tx_enable,
        .pfc_config =                   rpm_lmac_pfc_config,
        .mac_get_pfc_frm_cfg   =        rpm_lmac_get_pfc_frm_cfg,
+       .mac_reset   =                  rpm_lmac_reset,
 };
 
 static struct mac_ops          rpm2_mac_ops   = {
        .mac_tx_enable =                rpm_lmac_tx_enable,
        .pfc_config =                   rpm_lmac_pfc_config,
        .mac_get_pfc_frm_cfg   =        rpm_lmac_get_pfc_frm_cfg,
+       .mac_reset   =                  rpm_lmac_reset,
 };
 
 bool is_dev_rpm2(void *rpmd)
 int rpm_lmac_internal_loopback(void *rpmd, int lmac_id, bool enable)
 {
        rpm_t *rpm = rpmd;
-       u8 lmac_type;
+       struct lmac *lmac;
        u64 cfg;
 
        if (!is_lmac_valid(rpm, lmac_id))
                return -ENODEV;
-       lmac_type = rpm->mac_ops->get_lmac_type(rpm, lmac_id);
 
-       if (lmac_type == LMAC_MODE_QSGMII || lmac_type == LMAC_MODE_SGMII) {
+       lmac = lmac_pdata(lmac_id, rpm);
+       if (lmac->lmac_type == LMAC_MODE_QSGMII ||
+           lmac->lmac_type == LMAC_MODE_SGMII) {
                dev_err(&rpm->pdev->dev, "loopback not supported for LPC mode\n");
                return 0;
        }
 
        return 0;
 }
+
+int rpm_lmac_reset(void *rpmd, int lmac_id, u8 pf_req_flr)
+{
+       u64 rx_logl_xon, cfg;
+       rpm_t *rpm = rpmd;
+
+       if (!is_lmac_valid(rpm, lmac_id))
+               return -ENODEV;
+
+       /* Resetting PFC related CSRs */
+       rx_logl_xon = is_dev_rpm2(rpm) ? RPM2_CMRX_RX_LOGL_XON :
+                                        RPMX_CMRX_RX_LOGL_XON;
+       cfg = 0xff;
+
+       rpm_write(rpm, lmac_id, rx_logl_xon, cfg);
+
+       if (pf_req_flr)
+               rpm_lmac_internal_loopback(rpm, lmac_id, false);
+
+       return 0;
+}
 
 #define RPMX_MTI_MAC100X_CL01_PAUSE_QUANTA              0x80A8
 #define RPMX_MTI_MAC100X_CL89_PAUSE_QUANTA             0x8108
 #define RPM_DEFAULT_PAUSE_TIME                          0x7FF
+#define RPMX_CMRX_RX_LOGL_XON                          0x4100
 
 #define RPMX_MTI_MAC100X_XIF_MODE                      0x8100
 #define RPMX_ONESTEP_ENABLE                            BIT_ULL(5)
 int rpm2_get_nr_lmacs(void *rpmd);
 bool is_dev_rpm2(void *rpmd);
 int rpm_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);
+int rpm_lmac_reset(void *rpmd, int lmac_id, u8 pf_req_flr);
 #endif /* RPM_H */
 
         * Since LF is detached use LF number as -1.
         */
        rvu_npc_free_mcam_entries(rvu, pcifunc, -1);
+       rvu_mac_reset(rvu, pcifunc);
 
        mutex_unlock(&rvu->flr_lock);
 }
 
 int rvu_cgx_prio_flow_ctrl_cfg(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause,
                               u16 pfc_en);
 int rvu_cgx_cfg_pause_frm(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause);
+void rvu_mac_reset(struct rvu *rvu, u16 pcifunc);
 u32 rvu_cgx_get_lmac_fifolen(struct rvu *rvu, int cgx, int lmac);
 int npc_get_nixlf_mcam_index(struct npc_mcam *mcam, u16 pcifunc, int nixlf,
                             int type);
 
        mac_ops->mac_get_pfc_frm_cfg(cgxd, lmac_id, &rsp->tx_pause, &rsp->rx_pause);
        return err;
 }
+
+void rvu_mac_reset(struct rvu *rvu, u16 pcifunc)
+{
+       int pf = rvu_get_pf(pcifunc);
+       struct mac_ops *mac_ops;
+       struct cgx *cgxd;
+       u8 cgx, lmac;
+
+       if (!is_pf_cgxmapped(rvu, pf))
+               return;
+
+       rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx, &lmac);
+       cgxd = rvu_cgx_pdata(cgx, rvu);
+       mac_ops = get_mac_ops(cgxd);
+
+       if (mac_ops->mac_reset(cgxd, lmac, !is_vf(pcifunc)))
+               dev_err(rvu->dev, "Failed to reset MAC\n");
+}