regmap_write(pdata->regmap, SN_DSIA_CLK_FREQ_REG, val);
 }
 
-static unsigned int ti_sn_bridge_get_bpp(struct ti_sn65dsi86 *pdata)
+static unsigned int ti_sn_bridge_get_bpp(struct drm_connector *connector)
 {
-       if (pdata->connector->display_info.bpc <= 6)
+       if (connector->display_info.bpc <= 6)
                return 18;
        else
                return 24;
        0, 1620, 2160, 2430, 2700, 3240, 4320, 5400
 };
 
-static int ti_sn_bridge_calc_min_dp_rate_idx(struct ti_sn65dsi86 *pdata)
+static int ti_sn_bridge_calc_min_dp_rate_idx(struct ti_sn65dsi86 *pdata, unsigned int bpp)
 {
        unsigned int bit_rate_khz, dp_rate_mhz;
        unsigned int i;
                &pdata->bridge.encoder->crtc->state->adjusted_mode;
 
        /* Calculate minimum bit rate based on our pixel clock. */
-       bit_rate_khz = mode->clock * ti_sn_bridge_get_bpp(pdata);
+       bit_rate_khz = mode->clock * bpp;
 
        /* Calculate minimum DP data rate, taking 80% as per DP spec */
        dp_rate_mhz = DIV_ROUND_UP(bit_rate_khz * DP_CLK_FUDGE_NUM,
                                       struct drm_bridge_state *old_bridge_state)
 {
        struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
+       struct drm_connector *connector;
        const char *last_err_str = "No supported DP rate";
        unsigned int valid_rates;
        int dp_rate_idx;
        unsigned int val;
        int ret = -EINVAL;
        int max_dp_lanes;
+       unsigned int bpp;
+
+       connector = drm_atomic_get_new_connector_for_encoder(old_bridge_state->base.state,
+                                                            bridge->encoder);
+       if (!connector) {
+               dev_err_ratelimited(pdata->dev, "Could not get the connector\n");
+               return;
+       }
 
        max_dp_lanes = ti_sn_get_max_lanes(pdata);
        pdata->dp_lanes = min(pdata->dp_lanes, max_dp_lanes);
        drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET,
                           DP_ALTERNATE_SCRAMBLER_RESET_ENABLE);
 
+       bpp = ti_sn_bridge_get_bpp(connector);
        /* Set the DP output format (18 bpp or 24 bpp) */
-       val = (ti_sn_bridge_get_bpp(pdata) == 18) ? BPP_18_RGB : 0;
+       val = bpp == 18 ? BPP_18_RGB : 0;
        regmap_update_bits(pdata->regmap, SN_DATA_FORMAT_REG, BPP_18_RGB, val);
 
        /* DP lane config */
        valid_rates = ti_sn_bridge_read_valid_rates(pdata);
 
        /* Train until we run out of rates */
-       for (dp_rate_idx = ti_sn_bridge_calc_min_dp_rate_idx(pdata);
+       for (dp_rate_idx = ti_sn_bridge_calc_min_dp_rate_idx(pdata, bpp);
             dp_rate_idx < ARRAY_SIZE(ti_sn_bridge_dp_rate_lut);
             dp_rate_idx++) {
                if (!(valid_rates & BIT(dp_rate_idx)))