drm/amdgpu: set CP_HQD_PQ_DOORBELL_CONTROL.DOORBELL_MODE to 1 for sriov multiple vf.

In sriov multiple vf, Set CP_HQD_PQ_DOORBELL_CONTROL.DOORBELL_MODE to 1 to read WPTR from MQD.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index 476542b6e7b52d494c817d6ead674fed0ee18629..efe45e4edfd70b0c9725b05af9947b7a8ec45bbb 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -1821,7 +1821,7 @@ static int gfx_v9_4_3_xcc_mqd_init(struct amdgpu_ring *ring, int xcc_id)
                                    DOORBELL_SOURCE, 0);
                tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
                                    DOORBELL_HIT, 0);
-               if (amdgpu_sriov_vf(adev))
+               if (amdgpu_sriov_multi_vf_mode(adev))
                        tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
                                            DOORBELL_MODE, 1);
        } else {

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
index 3014925d95ffcd529407848a116d85ae467892a6..80320a6c8854a585f31fb7080ee47460fcbd9256 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
@@ -554,7 +554,7 @@ static void init_mqd_hiq_v9_4_3(struct mqd_manager *mm, void **mqd,
                m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK |
                                        1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT |
                                        1 << CP_HQD_PQ_CONTROL__KMD_QUEUE__SHIFT;
-               if (amdgpu_sriov_vf(mm->dev->adev))
+               if (amdgpu_sriov_multi_vf_mode(mm->dev->adev))
                        m->cp_hqd_pq_doorbell_control |= 1 <<
                                CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;
                m->cp_mqd_stride_size = kfd_hiq_mqd_stride(mm->dev);
@@ -667,7 +667,9 @@ static void init_mqd_v9_4_3(struct mqd_manager *mm, void **mqd,
                get_xcc_mqd(mqd_mem_obj, &xcc_mqd_mem_obj, offset*xcc);
 
                init_mqd(mm, (void **)&m, &xcc_mqd_mem_obj, &xcc_gart_addr, q);
-
+               if (amdgpu_sriov_multi_vf_mode(mm->dev->adev))
+                               m->cp_hqd_pq_doorbell_control |= 1 <<
+                                       CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;
                m->cp_mqd_stride_size = offset;
 
                /*
@@ -727,6 +729,9 @@ static void update_mqd_v9_4_3(struct mqd_manager *mm, void *mqd,
                m = get_mqd(mqd + size * xcc);
                update_mqd(mm, m, q, minfo);
 
+               if (amdgpu_sriov_multi_vf_mode(mm->dev->adev))
+                               m->cp_hqd_pq_doorbell_control |= 1 <<
+                                       CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;
                update_cu_mask(mm, m, minfo, xcc);
 
                if (q->format == KFD_QUEUE_FORMAT_AQL) {
@@ -749,6 +754,21 @@ static void update_mqd_v9_4_3(struct mqd_manager *mm, void *mqd,
        }
 }
 
+static void restore_mqd_v9_4_3(struct mqd_manager *mm, void **mqd,
+                       struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr,
+                       struct queue_properties *qp,
+                       const void *mqd_src,
+                       const void *ctl_stack_src, u32 ctl_stack_size)
+{
+       restore_mqd(mm, mqd, mqd_mem_obj, gart_addr, qp, mqd_src, ctl_stack_src, ctl_stack_size);
+       if (amdgpu_sriov_multi_vf_mode(mm->dev->adev)) {
+               struct v9_mqd *m;
+
+               m = (struct v9_mqd *) mqd_mem_obj->cpu_ptr;
+               m->cp_hqd_pq_doorbell_control |= 1 <<
+                               CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_MODE__SHIFT;
+       }
+}
 static int destroy_mqd_v9_4_3(struct mqd_manager *mm, void *mqd,
                   enum kfd_preempt_type type, unsigned int timeout,
                   uint32_t pipe_id, uint32_t queue_id)
@@ -883,7 +903,6 @@ struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type,
                mqd->is_occupied = kfd_is_occupied_cp;
                mqd->get_checkpoint_info = get_checkpoint_info;
                mqd->checkpoint_mqd = checkpoint_mqd;
-               mqd->restore_mqd = restore_mqd;
                mqd->mqd_size = sizeof(struct v9_mqd);
                mqd->mqd_stride = mqd_stride_v9;
 #if defined(CONFIG_DEBUG_FS)
@@ -895,12 +914,14 @@ struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type,
                        mqd->init_mqd = init_mqd_v9_4_3;
                        mqd->load_mqd = load_mqd_v9_4_3;
                        mqd->update_mqd = update_mqd_v9_4_3;
+                       mqd->restore_mqd = restore_mqd_v9_4_3;
                        mqd->destroy_mqd = destroy_mqd_v9_4_3;
                        mqd->get_wave_state = get_wave_state_v9_4_3;
                } else {
                        mqd->init_mqd = init_mqd;
                        mqd->load_mqd = load_mqd;
                        mqd->update_mqd = update_mqd;
+                       mqd->restore_mqd = restore_mqd;
                        mqd->destroy_mqd = kfd_destroy_mqd_cp;
                        mqd->get_wave_state = get_wave_state;
                }