*/
        clk_set_parent(clk[cko_sel], clk[ipg]);
 
-       imx_register_uart_clocks(6);
+       imx_register_uart_clocks();
 
        return 0;
 }
 
 
        clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);
 
-       imx_register_uart_clocks(7);
+       imx_register_uart_clocks();
 
        imx_print_silicon_rev("i.MX27", mx27_revision());
 }
 
         */
        clk_prepare_enable(clk[scc_gate]);
 
-       imx_register_uart_clocks(4);
+       imx_register_uart_clocks();
 
        imx_print_silicon_rev("i.MX35", mx35_revision());
 }
 
        r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
        clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
 
-       imx_register_uart_clocks(5);
+       imx_register_uart_clocks();
 }
 CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init);
 
        val |= 1 << 23;
        writel(val, MXC_CCM_CLPCR);
 
-       imx_register_uart_clocks(3);
+       imx_register_uart_clocks();
 }
 CLK_OF_DECLARE(imx51_ccm, "fsl,imx51-ccm", mx51_clocks_init);
 
        r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);
        clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);
 
-       imx_register_uart_clocks(5);
+       imx_register_uart_clocks();
 }
 CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init);
 
                               hws[IMX6QDL_CLK_PLL3_USB_OTG]->clk);
        }
 
-       imx_register_uart_clocks(2);
+       imx_register_uart_clocks();
 }
 CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);
 
        clk_set_parent(hws[IMX6SL_CLK_LCDIF_AXI_SEL]->clk,
                       hws[IMX6SL_CLK_PLL2_PFD2]->clk);
 
-       imx_register_uart_clocks(2);
+       imx_register_uart_clocks();
 }
 CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);
 
 
        of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
 
-       imx_register_uart_clocks(5);
+       imx_register_uart_clocks();
 
        /* Lower the AHB clock rate before changing the clock source. */
        clk_set_rate(hws[IMX6SLL_CLK_AHB]->clk, 99000000);
 
        clk_set_parent(hws[IMX6SX_CLK_QSPI1_SEL]->clk, hws[IMX6SX_CLK_PLL2_BUS]->clk);
        clk_set_parent(hws[IMX6SX_CLK_QSPI2_SEL]->clk, hws[IMX6SX_CLK_PLL2_BUS]->clk);
 
-       imx_register_uart_clocks(2);
+       imx_register_uart_clocks();
 }
 CLK_OF_DECLARE(imx6sx, "fsl,imx6sx-ccm", imx6sx_clocks_init);
 
        hws[IMX7D_USB1_MAIN_480M_CLK] = imx_clk_hw_fixed_factor("pll_usb1_main_clk", "osc", 20, 1);
        hws[IMX7D_USB_MAIN_480M_CLK] = imx_clk_hw_fixed_factor("pll_usb_main_clk", "osc", 20, 1);
 
-       imx_register_uart_clocks(7);
+       imx_register_uart_clocks();
 
 }
 CLK_OF_DECLARE(imx7d, "fsl,imx7d-ccm", imx7d_clocks_init);
 
 
        of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
 
-       imx_register_uart_clocks(2);
+       imx_register_uart_clocks();
 }
 CLK_OF_DECLARE(imx7ulp_clk_pcc2, "fsl,imx7ulp-pcc2", imx7ulp_clk_pcc2_init);
 
 
        of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
 
-       imx_register_uart_clocks(7);
+       imx_register_uart_clocks();
 }
 CLK_OF_DECLARE(imx7ulp_clk_pcc3, "fsl,imx7ulp-pcc3", imx7ulp_clk_pcc3_init);
 
 
                goto unregister_hws;
        }
 
-       imx_register_uart_clocks(4);
+       imx_register_uart_clocks();
 
        return 0;
 
 
                goto unregister_hws;
        }
 
-       imx_register_uart_clocks(4);
+       imx_register_uart_clocks();
 
        return 0;
 
 
 
        of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
 
-       imx_register_uart_clocks(4);
+       imx_register_uart_clocks();
 
        return 0;
 }
 
                goto unregister_hws;
        }
 
-       imx_register_uart_clocks(4);
+       imx_register_uart_clocks();
 
        return 0;
 
 
        if (ret)
                return ret;
 
-       imx_register_uart_clocks(1);
+       imx_register_uart_clocks();
 
        /* register the pcc3 reset controller */
        return imx8ulp_pcc_reset_init(pdev, base, pcc3_resets, ARRAY_SIZE(pcc3_resets));
 
 __setup_param("earlyprintk", imx_keep_uart_earlyprintk,
              imx_keep_uart_clocks_param, 0);
 
-void imx_register_uart_clocks(unsigned int clk_count)
+void imx_register_uart_clocks(void)
 {
        unsigned int num __maybe_unused;
 
 
 void imx_check_clocks(struct clk *clks[], unsigned int count);
 void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count);
 #ifndef MODULE
-void imx_register_uart_clocks(unsigned int clk_count);
+void imx_register_uart_clocks(void);
 #else
-static inline void imx_register_uart_clocks(unsigned int clk_count)
+static inline void imx_register_uart_clocks(void)
 {
 }
 #endif