drm/radeon: split out radeon_uvd_resume from uvd_v4_2_resume

For powergating, we just need to re-init the registers, there
is no need to restore the uvd BOs.  This just adds needless
work when powergating uvd for playback while the system is
on.  We only need to restore the uvd BOs on an actual resume
from suspend or when the driver loads.

This fixes multi-stream UVD playback on KB systems.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index e336a31230ea8d41ac69b322a37ba54766947f60..79124f81c00ebdf0b3e6b5fdcea770bf14794cce 100644 (file)
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -7051,12 +7051,15 @@ static int cik_startup(struct radeon_device *rdev)
                return r;
        }
 
-       r = uvd_v4_2_resume(rdev);
+       r = radeon_uvd_resume(rdev);
        if (!r) {
-               r = radeon_fence_driver_start_ring(rdev,
-                                                  R600_RING_TYPE_UVD_INDEX);
-               if (r)
-                       dev_err(rdev->dev, "UVD fences init error (%d).\n", r);
+               r = uvd_v4_2_resume(rdev);
+               if (!r) {
+                       r = radeon_fence_driver_start_ring(rdev,
+                                                          R600_RING_TYPE_UVD_INDEX);
+                       if (r)
+                               dev_err(rdev->dev, "UVD fences init error (%d).\n", r);
+               }
        }
        if (r)
                rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0;

diff --git a/drivers/gpu/drm/radeon/uvd_v4_2.c b/drivers/gpu/drm/radeon/uvd_v4_2.c
index d7e4807860983c46b046bbf92cea093c2b8139e7..d04d5073eef2b9903eca4d48adf9c048da806747 100644 (file)
--- a/drivers/gpu/drm/radeon/uvd_v4_2.c
+++ b/drivers/gpu/drm/radeon/uvd_v4_2.c
@@ -39,11 +39,6 @@ int uvd_v4_2_resume(struct radeon_device *rdev)
 {
        uint64_t addr;
        uint32_t size;
-       int r;
-
-       r = radeon_uvd_resume(rdev);
-       if (r)
-               return r;
 
        /* programm the VCPU memory controller bits 0-27 */
        addr = rdev->uvd.gpu_addr >> 3;