]> www.infradead.org Git - linux.git/commitdiff
arm64: dts: renesas: r8a779a0: Add missing iommus properties
authorGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 8 Jul 2024 09:37:22 +0000 (11:37 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 29 Jul 2024 09:51:36 +0000 (11:51 +0200)
Add missing iommus properties to all EthernetAVB, DMAC, and Frame
Compression Processor device nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/39da0dddf7e7f1fde2b2d83444af7bb5ae73b922.1720430758.git.geert+renesas@glider.be
arch/arm64/boot/dts/renesas/r8a779a0.dtsi

index d76347001cc13c65bfee5c160bb30f336dcb0cce..69652d309fe6f01ef5f78510e084376b9e442b6e 100644 (file)
                        phy-mode = "rgmii";
                        rx-internal-delay-ps = <0>;
                        tx-internal-delay-ps = <0>;
+                       iommus = <&ipmmu_ds1 0>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        phy-mode = "rgmii";
                        rx-internal-delay-ps = <0>;
                        tx-internal-delay-ps = <0>;
+                       iommus = <&ipmmu_ds1 1>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        phy-mode = "rgmii";
                        rx-internal-delay-ps = <0>;
                        tx-internal-delay-ps = <0>;
+                       iommus = <&ipmmu_ds1 2>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        phy-mode = "rgmii";
                        rx-internal-delay-ps = <0>;
                        tx-internal-delay-ps = <0>;
+                       iommus = <&ipmmu_ds1 3>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        phy-mode = "rgmii";
                        rx-internal-delay-ps = <0>;
                        tx-internal-delay-ps = <0>;
+                       iommus = <&ipmmu_ds1 4>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        phy-mode = "rgmii";
                        rx-internal-delay-ps = <0>;
                        tx-internal-delay-ps = <0>;
+                       iommus = <&ipmmu_ds1 11>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                        resets = <&cpg 709>;
                        #dma-cells = <1>;
                        dma-channels = <16>;
+                       iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
+                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
+                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
+                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
+                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
+                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
+                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
+                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
                };
 
                dmac2: dma-controller@e7351000 {
                        resets = <&cpg 710>;
                        #dma-cells = <1>;
                        dma-channels = <8>;
+                       iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>,
+                                <&ipmmu_ds0 18>, <&ipmmu_ds0 19>,
+                                <&ipmmu_ds0 20>, <&ipmmu_ds0 21>,
+                                <&ipmmu_ds0 22>, <&ipmmu_ds0 23>;
                };
 
                mmc0: mmc@ee140000 {
                        clocks = <&cpg CPG_MOD 508>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                        resets = <&cpg 508>;
+                       iommus = <&ipmmu_vi1 6>;
                };
 
                fcpvd1: fcp@fea11000 {
                        clocks = <&cpg CPG_MOD 509>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
                        resets = <&cpg 509>;
+                       iommus = <&ipmmu_vi1 7>;
                };
 
                vspd0: vsp@fea20000 {