Depending on the addressing mode, we must not overwrite bit 0-31 of the
register. In addition, 24 bit and 31 bit have to set certain bits to 0,
which is guaranteed by converting the end address to an effective
address.
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
 
                start += PAGE_SIZE;
        }
-       if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC)
-               vcpu->run->s.regs.gprs[reg2] = end;
+       if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
+               if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_AMODE_64BIT) {
+                       vcpu->run->s.regs.gprs[reg2] = end;
+               } else {
+                       vcpu->run->s.regs.gprs[reg2] &= ~0xffffffffUL;
+                       end = kvm_s390_logical_to_effective(vcpu, end);
+                       vcpu->run->s.regs.gprs[reg2] |= end;
+               }
+       }
        return 0;
 }