arm64: dts: qcom: sm8650: add PPI interrupt partitions for the ARM PMUs

The PMUs shares the same per-cpu (PPI) interrupt, so declare the proper
interrupt partition maps and use the 4th interrupt cell to pass the
partition phandle for each ARM PMU node.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250228-topic-sm8650-pmu-ppi-partition-v4-2-78cffd35c73d@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 7dd8ae0d8feeac01fd6329a40fba4c5ce466f8e1..90917f9f9c5cee9c27c566a64a11ab4b0910d06a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -1576,17 +1576,17 @@
 
        pmu-a520 {
                compatible = "arm,cortex-a520-pmu";
-               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW 0>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>;
        };
 
        pmu-a720 {
                compatible = "arm,cortex-a720-pmu";
-               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW 0>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster1>;
        };
 
        pmu-x4 {
                compatible = "arm,cortex-x4-pmu";
-               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW 0>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster2>;
        };
 
        psci {
@@ -6754,6 +6754,20 @@
                        #size-cells = <2>;
                        ranges;
 
+                       ppi-partitions {
+                               ppi_cluster0: interrupt-partition-0 {
+                                       affinity = <&cpu0 &cpu1>;
+                               };
+
+                               ppi_cluster1: interrupt-partition-1 {
+                                       affinity = <&cpu2 &cpu3 &cpu4 &cpu5 &cpu6>;
+                               };
+
+                               ppi_cluster2: interrupt-partition-2 {
+                                       affinity = <&cpu7>;
+                               };
+                       };
+
                        gic_its: msi-controller@17140000 {
                                compatible = "arm,gic-v3-its";
                                reg = <0 0x17140000 0 0x20000>;