if (updated & cmask || !cstate->base.active)
                                continue;
 
-                       if (skl_ddb_allocation_overlaps(entries, &cstate->wm.skl.ddb, i))
+                       if (skl_ddb_allocation_overlaps(dev_priv,
+                                                       entries,
+                                                       &cstate->wm.skl.ddb,
+                                                       i))
                                continue;
 
                        updated |= cmask;
 
 int intel_disable_sagv(struct drm_i915_private *dev_priv);
 bool skl_wm_level_equals(const struct skl_wm_level *l1,
                         const struct skl_wm_level *l2);
-bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry **entries,
+bool skl_ddb_allocation_overlaps(struct drm_i915_private *dev_priv,
+                                const struct skl_ddb_entry **entries,
                                 const struct skl_ddb_entry *ddb,
                                 int ignore);
 bool ilk_disable_lp_wm(struct drm_device *dev);
 
        return a->start < b->end && b->start < a->end;
 }
 
-bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry **entries,
+bool skl_ddb_allocation_overlaps(struct drm_i915_private *dev_priv,
+                                const struct skl_ddb_entry **entries,
                                 const struct skl_ddb_entry *ddb,
                                 int ignore)
 {
-       int i;
+       enum pipe pipe;
 
-       for (i = 0; i < I915_MAX_PIPES; i++)
-               if (i != ignore && entries[i] &&
-                   skl_ddb_entries_overlap(ddb, entries[i]))
+       for_each_pipe(dev_priv, pipe) {
+               if (pipe != ignore && entries[pipe] &&
+                   skl_ddb_entries_overlap(ddb, entries[pipe]))
                        return true;
+       }
 
        return false;
 }