}
 EXPORT_SYMBOL_GPL(kvm_apic_set_eoi_accelerated);
 
-static void apic_send_ipi(struct kvm_lapic *apic)
+static void apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high)
 {
-       u32 icr_low = kvm_lapic_get_reg(apic, APIC_ICR);
-       u32 icr_high = kvm_lapic_get_reg(apic, APIC_ICR2);
        struct kvm_lapic_irq irq;
 
        irq.vector = icr_low & APIC_VECTOR_MASK;
        }
        case APIC_ICR:
                /* No delay here, so we always clear the pending bit */
-               kvm_lapic_set_reg(apic, APIC_ICR, val & ~(1 << 12));
-               apic_send_ipi(apic);
+               val &= ~(1 << 12);
+               apic_send_ipi(apic, val, kvm_lapic_get_reg(apic, APIC_ICR2));
+               kvm_lapic_set_reg(apic, APIC_ICR, val);
                break;
 
        case APIC_ICR2: