platform/x86: mlx-platform: Fix extended topology configuration for power supply...

Fix topology configuration for power supply units in structure
'mlxplat_mlxcpld_ext_pwr_items_data', due to hardware change.

Note: no need to backport the fix, since there is no such hardware yet
(equipped with four power) at the filed.

Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index 8cf8c1be26660bf7aa52eb6c68cc5bb43c217140..1506ec0a47771ecddb78c2212f83c335fd51e721 100644 (file)
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -171,7 +171,6 @@
 #define MLXPLAT_CPLD_NR_NONE                   -1
 #define MLXPLAT_CPLD_PSU_DEFAULT_NR            10
 #define MLXPLAT_CPLD_PSU_MSNXXXX_NR            4
-#define MLXPLAT_CPLD_PSU_MSNXXXX_NR2           3
 #define MLXPLAT_CPLD_FAN1_DEFAULT_NR           11
 #define MLXPLAT_CPLD_FAN2_DEFAULT_NR           12
 #define MLXPLAT_CPLD_FAN3_DEFAULT_NR           13
@@ -347,6 +346,15 @@ static struct i2c_board_info mlxplat_mlxcpld_pwr[] = {
        },
 };
 
+static struct i2c_board_info mlxplat_mlxcpld_ext_pwr[] = {
+       {
+               I2C_BOARD_INFO("dps460", 0x5b),
+       },
+       {
+               I2C_BOARD_INFO("dps460", 0x5a),
+       },
+};
+
 static struct i2c_board_info mlxplat_mlxcpld_fan[] = {
        {
                I2C_BOARD_INFO("24c32", 0x50),
@@ -921,15 +929,15 @@ static struct mlxreg_core_data mlxplat_mlxcpld_ext_pwr_items_data[] = {
                .label = "pwr3",
                .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
                .mask = BIT(2),
-               .hpdev.brdinfo = &mlxplat_mlxcpld_pwr[0],
-               .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR2,
+               .hpdev.brdinfo = &mlxplat_mlxcpld_ext_pwr[0],
+               .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
        },
        {
                .label = "pwr4",
                .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
                .mask = BIT(3),
-               .hpdev.brdinfo = &mlxplat_mlxcpld_pwr[1],
-               .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR2,
+               .hpdev.brdinfo = &mlxplat_mlxcpld_ext_pwr[1],
+               .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
        },
 };