]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
x86: cpu: microcode: Re-evaluate bugs in a CPU after microcode loading
authorMihai Carabas <mihai.carabas@oracle.com>
Mon, 18 Mar 2019 13:56:16 +0000 (15:56 +0200)
committerBrian Maly <brian.maly@oracle.com>
Tue, 26 Mar 2019 20:32:43 +0000 (16:32 -0400)
After doing a new microcode load, we have to re-evaluate bugs in the CPU in
order to see if the microcode brought changes. We clear caps for
X86_BUG_SPEC_STORE_BYPASS, X86_BUG_CPU_MELTDOWN and X86_BUG_L1TF as these can
be modified by new microcode loading.

Orabug: 29336760

Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Brian Maly <brian.maly@oracle.com>
arch/x86/include/asm/processor.h
arch/x86/kernel/cpu/common.c
arch/x86/kernel/cpu/microcode/core.c

index e8aabd27e9762c0ad6c180e765616ca39b8ac0f4..c64a698b5e428db852c194669de045c3d7e4e252 100644 (file)
@@ -192,6 +192,7 @@ extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c,
 extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
 extern void init_amd_cacheinfo(struct cpuinfo_x86 *c);
 
+extern void cpu_set_bug_bits(struct cpuinfo_x86 *c);
 extern int detect_extended_topology(struct cpuinfo_x86 *c);
 extern void detect_ht(struct cpuinfo_x86 *c);
 
index 1f2b47ceede6269b043ed5becd65e560f3df288a..9fa8a129425cd524eea5d60c18072a4f89781a89 100644 (file)
@@ -861,7 +861,7 @@ static const struct x86_cpu_id cpu_no_l1tf[] = {
        {}
 };
 
-static void cpu_set_bug_bits(struct cpuinfo_x86 *c)
+void cpu_set_bug_bits(struct cpuinfo_x86 *c)
 {
        u64 ia32_cap = 0;
 
index 4e8280c7f96dad20299917a689c93473a714124a..a6e07caf4cff07b14bc024b45ff057f1805961f5 100644 (file)
@@ -164,6 +164,23 @@ static int collect_cpu_info(int cpu)
 
 static void microcode_late_eval_cpuid(void *arg)
 {
+       /*
+        * First we clear the bugs that are not fully connected with
+        * CPU model and can be modified after a microcode loading
+        * and than re-evealuate CPU bugs. We are using CPU 0 as all
+        * of these are stored in boot_cpu_data.
+        */
+       if(smp_processor_id() == 0) {
+               setup_clear_cpu_cap(X86_BUG_SPEC_STORE_BYPASS);
+               setup_clear_cpu_cap(X86_BUG_CPU_MELTDOWN);
+               setup_clear_cpu_cap(X86_BUG_L1TF);
+               cpu_set_bug_bits(&cpu_data(smp_processor_id()));
+
+               /* If CPU is not susceptible to L1TF, clean-up the L1TF_PTEINV cap. */
+               if (!boot_cpu_has(X86_BUG_L1TF))
+                       setup_clear_cpu_cap(X86_FEATURE_L1TF_PTEINV);
+       }
+
        init_scattered_cpuid_features(&cpu_data(smp_processor_id()),
            GET_CPU_CAP_FULL);
 }