drm/amd/display: Add NBIO reg offsets to DC

[Why&How]
Add a field to store the NBIO IP offset for use with runtime offset
calculation

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 917bd5ad3932677fe80c3a39211bf4e9798326b7..d96a99d1c09e35779bac0d70ddc0a15e633e04d1 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1565,6 +1565,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
        init_data.flags.enable_mipi_converter_optimization = true;
 
        init_data.dcn_reg_offsets = adev->reg_offset[DCE_HWIP][0];
+       init_data.nbio_reg_offsets = adev->reg_offset[NBIO_HWIP][0];
 
        INIT_LIST_HEAD(&adev->dm.da_list);
 

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 6039b3487d4fda7aa121c429153c38026b710908..7453ec54420b8a7b1234bc13c9e6fe9f944b0c7a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -863,6 +863,7 @@ static bool dc_construct_ctx(struct dc *dc,
        dc_ctx->dc_stream_id_count = 0;
        dc_ctx->dce_environment = init_params->dce_environment;
        dc_ctx->dcn_reg_offsets = init_params->dcn_reg_offsets;
+       dc_ctx->nbio_reg_offsets = init_params->nbio_reg_offsets;
 
        /* Create logger */
 
@@ -1243,6 +1244,7 @@ struct dc *dc_create(const struct dc_init_data *init_params)
        }
 
        dc->dcn_reg_offsets = init_params->dcn_reg_offsets;
+       dc->nbio_reg_offsets = init_params->nbio_reg_offsets;
 
        /* Populate versioning information */
        dc->versions.dc_ver = DC_VER;

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index faa22580852b77f6d3acfed353f241d60cb28ce0..89a3cc8f92744dd983bb1adefb0b5b30fc80de40 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -810,6 +810,7 @@ struct dc {
        struct vm_helper *vm_helper;
 
        uint32_t *dcn_reg_offsets;
+       uint32_t *nbio_reg_offsets;
 };
 
 enum frame_buffer_mode {
@@ -857,6 +858,7 @@ struct dc_init_data {
         * before them.
         */
        uint32_t *dcn_reg_offsets;
+       uint32_t *nbio_reg_offsets;
 };
 
 struct dc_callback_init {

diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index 077a93e815611337687a2ad52571e64c2bcd14b9..ad9041472ccae1aadf460500225f11ae83b71cfa 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -877,6 +877,7 @@ struct dc_context {
        struct cp_psp cp_psp;
 #endif
        uint32_t *dcn_reg_offsets;
+       uint32_t *nbio_reg_offsets;
 };
 
 /* DSC DPCD capabilities */