/* reject unknown flag values */
        if (args->flags & ~(RADEON_GEM_USERPTR_READONLY |
-           RADEON_GEM_USERPTR_ANONONLY))
+           RADEON_GEM_USERPTR_ANONONLY | RADEON_GEM_USERPTR_VALIDATE))
                return -EINVAL;
 
        /* readonly pages not tested on older hardware */
        if (r)
                goto release_object;
 
+       if (args->flags & RADEON_GEM_USERPTR_VALIDATE) {
+               down_read(¤t->mm->mmap_sem);
+               r = radeon_bo_reserve(bo, true);
+               if (r) {
+                       up_read(¤t->mm->mmap_sem);
+                       goto release_object;
+               }
+
+               radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT);
+               r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
+               radeon_bo_unreserve(bo);
+               up_read(¤t->mm->mmap_sem);
+               if (r)
+                       goto release_object;
+       }
+
        r = drm_gem_handle_create(filp, gobj, &handle);
        /* drop reference from allocate - handle holds it now */
        drm_gem_object_unreference_unlocked(gobj);
 
  */
 #define RADEON_GEM_USERPTR_READONLY    (1 << 0)
 #define RADEON_GEM_USERPTR_ANONONLY    (1 << 1)
+#define RADEON_GEM_USERPTR_VALIDATE    (1 << 2)
 
 struct drm_radeon_gem_userptr {
        uint64_t                addr;