void (*disable_source)(struct intel_dp *,
                               const struct intel_crtc_state *);
        void (*activate)(struct intel_dp *);
+       void (*setup_vsc)(struct intel_dp *, const struct intel_crtc_state *);
 };
 
 enum intel_pch {
 
 
        dev_priv->psr.busy_frontbuffer_bits = 0;
 
-       if (HAS_DDI(dev_priv)) {
-
-               hsw_psr_setup_vsc(intel_dp, crtc_state);
+       dev_priv->psr.setup_vsc(intel_dp, crtc_state);
 
+       if (HAS_DDI(dev_priv)) {
                /* Enable PSR on the panel */
                hsw_psr_enable_sink(intel_dp);
 
                hsw_psr_enable_source(intel_dp, crtc_state);
 
        } else {
-               vlv_psr_setup_vsc(intel_dp, crtc_state);
-
                /* Enable PSR on the panel */
                vlv_psr_enable_sink(intel_dp);
 
        if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
                dev_priv->psr.disable_source = vlv_psr_disable;
                dev_priv->psr.activate = vlv_psr_activate;
+               dev_priv->psr.setup_vsc = vlv_psr_setup_vsc;
        } else {
                dev_priv->psr.disable_source = hsw_psr_disable;
                dev_priv->psr.activate = hsw_psr_activate;
+               dev_priv->psr.setup_vsc = hsw_psr_setup_vsc;
        }
 }