priv.base = of_io_request_and_map(np, 0, np->name);
        if (IS_ERR(priv.base)) {
-               pr_err("%s: unable to map resource\n", np->name);
+               pr_err("%pOFn: unable to map resource\n", np);
                return PTR_ERR(priv.base);
        }
 
 
        if (ret)
                return ret;
 
-       pr_info("%s #0 at %p, irq=%d\n", timer->name, timer_baseaddr, irq);
+       pr_info("%pOFn #0 at %p, irq=%d\n", timer, timer_baseaddr, irq);
 
        return 0;
 }
 
        *base = of_iomap(np, 0);
 
        if (!*base)
-               panic("Unable to map regs for %s", np->name);
+               panic("Unable to map regs for %pOFn", np);
 
        /*
         * Not all implementations use a periphal clock, so don't panic
        pclk = of_clk_get_by_name(np, "pclk");
        if (!IS_ERR(pclk))
                if (clk_prepare_enable(pclk))
-                       pr_warn("pclk for %s is present, but could not be activated\n",
-                               np->name);
+                       pr_warn("pclk for %pOFn is present, but could not be activated\n",
+                               np);
 
        timer_clk = of_clk_get_by_name(np, "timer");
        if (IS_ERR(timer_clk))
 try_clock_freq:
        if (of_property_read_u32(np, "clock-freq", rate) &&
            of_property_read_u32(np, "clock-frequency", rate))
-               panic("No clock nor clock-frequency property for %s", np->name);
+               panic("No clock nor clock-frequency property for %pOFn", np);
 }
 
 static void __init add_clockevent(struct device_node *event_timer)
 
        /* timer registers are shared with watchdog timer */
        timer_base = of_iomap(np, 0);
        if (!timer_base) {
-               pr_err("%s: unable to map resource\n", np->name);
+               pr_err("%pOFn: unable to map resource\n", np);
                return -ENXIO;
        }
 
        clk = of_clk_get(np, 0);
        if (IS_ERR(clk)) {
-               pr_crit("%s: unable to get clk\n", np->name);
+               pr_crit("%pOFn: unable to get clk\n", np);
                return PTR_ERR(clk);
        }
 
        /* we are only interested in OS-timer0 irq */
        irq = irq_of_parse_and_map(np, 0);
        if (irq <= 0) {
-               pr_crit("%s: unable to parse OS-timer0 irq\n", np->name);
+               pr_crit("%pOFn: unable to parse OS-timer0 irq\n", np);
                return -EINVAL;
        }
 
 
        /* timer registers are shared with watchdog timer */
        timer_base = of_iomap(np, 0);
        if (!timer_base) {
-               pr_err("%s: unable to map resource\n", np->name);
+               pr_err("%pOFn: unable to map resource\n", np);
                return -ENXIO;
        }
 
        clk = of_clk_get(np, 0);
        if (IS_ERR(clk)) {
-               pr_err("%s: unable to get clk\n", np->name);
+               pr_err("%pOFn: unable to get clk\n", np);
                return PTR_ERR(clk);
        }
 
        /* we are only interested in timer1 irq */
        irq = irq_of_parse_and_map(np, 1);
        if (irq <= 0) {
-               pr_err("%s: unable to parse timer1 irq\n", np->name);
+               pr_err("%pOFn: unable to parse timer1 irq\n", np);
                return -EINVAL;
        }
 
        /* setup timer1 as clockevent timer */
        ret = setup_irq(irq, &orion_clkevt_irq);
        if (ret) {
-               pr_err("%s: unable to setup irq\n", np->name);
+               pr_err("%pOFn: unable to setup irq\n", np);
                return ret;
        }
 
 
 
        clk = of_clk_get(node, 0);
        if (IS_ERR(clk)) {
-               pr_err("No clock for %s\n", node->name);
+               pr_err("No clock for %pOFn\n", node);
                return PTR_ERR(clk);
        }
        clk_prepare_enable(clk);
 
        if (of_clk_get_parent_count(np) == 3) {
                clk2 = of_clk_get(np, 1);
                if (IS_ERR(clk2)) {
-                       pr_err("sp804: %s clock not found: %d\n", np->name,
+                       pr_err("sp804: %pOFn clock not found: %d\n", np,
                                (int)PTR_ERR(clk2));
                        clk2 = NULL;
                }
 
 
        of_address_to_resource(node, 0, &res);
        scnprintf(timer->clocksource_name, sizeof(timer->clocksource_name),
-                       "%llx.%s_clocksource",
-                       (unsigned long long)res.start, node->name);
+                       "%llx.%pOFn_clocksource",
+                       (unsigned long long)res.start, node);
 
        scnprintf(timer->clockevent_name, sizeof(timer->clockevent_name),
-                       "%llx.%s_clockevent",
-                       (unsigned long long)res.start, node->name);
+                       "%llx.%pOFn_clockevent",
+                       (unsigned long long)res.start, node);
 
        if (timer->interrupt_regs && irqnr) {
                timer->clkevt.name              = timer->clockevent_name;