raw_spin_unlock_irqrestore(&iommu->register_lock, flags);
 }
 
-static int iommu_enable_translation(struct intel_iommu *iommu)
+static void iommu_enable_translation(struct intel_iommu *iommu)
 {
        u32 sts;
        unsigned long flags;
                      readl, (sts & DMA_GSTS_TES), sts);
 
        raw_spin_unlock_irqrestore(&iommu->register_lock, flags);
-       return 0;
 }
 
-static int iommu_disable_translation(struct intel_iommu *iommu)
+static void iommu_disable_translation(struct intel_iommu *iommu)
 {
        u32 sts;
        unsigned long flag;
                      readl, (!(sts & DMA_GSTS_TES)), sts);
 
        raw_spin_unlock_irqrestore(&iommu->register_lock, flag);
-       return 0;
 }
 
 
 
                iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL);
                iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);
-
-               ret = iommu_enable_translation(iommu);
-               if (ret)
-                       goto free_iommu;
-
+               iommu_enable_translation(iommu);
                iommu_disable_protect_mem_regions(iommu);
        }
 
 
                iommu->flush.flush_context(iommu, 0, 0, 0,
                                           DMA_CCMD_GLOBAL_INVL);
-               iommu->flush.flush_iotlb(iommu, 0, 0, 0,
-                                        DMA_TLB_GLOBAL_FLUSH);
-               if (iommu_enable_translation(iommu))
-                       return 1;
+               iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);
+               iommu_enable_translation(iommu);
                iommu_disable_protect_mem_regions(iommu);
        }